XE8801AMI027LF Semtech, XE8801AMI027LF Datasheet - Page 62

IC DAS 16BIT FLASH 8K MTP 44LQFP

XE8801AMI027LF

Manufacturer Part Number
XE8801AMI027LF
Description
IC DAS 16BIT FLASH 8K MTP 44LQFP
Manufacturer
Semtech
Datasheet

Specifications of XE8801AMI027LF

Applications
Sensing Machine
Core Processor
RISC
Program Memory Type
FLASH (22 kB)
Controller Series
XE8000
Ram Size
512 x 8
Interface
UART, USRT
Number Of I /o
24
Voltage - Supply
2.4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-LQFP
For Use With
XE8000MP - PROG BOARD AND PROSTART2 CARD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XE8801AMI027LF
Manufacturer:
Semtech
Quantity:
10 000
11.4 Interrupts and events map
11.5 Port A (PA) Operation
The Port A input status (debounced or not) can be read from RegPAin.
Debounce mode:
Each bit in Port A can be individually debounced by setting the corresponding bit in RegPADebounce. After reset,
the debounce function is disabled. After enabling the debouncer, the change of the input value is accepted only if
the input value is identical at two consecutive sampling on the rising edge of the selected clock. Selection of the
clock is done by the bit DebFast in Register RegSysMisc (see clock block documentation for more precision on
the frequency).
Pull-ups:
When the corresponding bit in RegPAPullup is set to 0, the inputs are floating (pull-up resistors are disconnected).
When the corresponding bit in RegPAPullup is set to 1, a pull-up resistor is connected to the input pin. Port A
starts up with the pull-up resistors disconnected.
Port A as an interrupt source:
Each Port A input is an interrupt request source and can be set on rising or falling edge with the corresponding bit
in RegPAEdge. After reset, the rising edge is selected for interrupt generation by default. The interrupt source can
be debounced by setting register RegPADebounce.
Note: care must be taken when modifying RegPAEdge because this register performs an edge selection. The
change of this register may result in a transition which may be interpreted as a valid interruption.
© Semtech 2005
CkDebounce
Interrupt source
Debounced
pa_irqbus[5]
pa_irqbus[4]
pa_irqbus[1]
pa_irqbus[0]
pa_irqbus[7]
pa_irqbus[6]
pa_irqbus[3]
pa_irqbus[2]
Input
RegIrqMid[5]
RegIrqMid[4]
RegIrqMid[1]
RegIrqMid[0]
RegIrqLow[7]
RegIrqLow[6]
RegIrqLow[3]
RegIrqLow[2]
the interrupt manager
Default mapping in
DebFast
Table 11-7: debounce frequency selection
0
1
Figure 11-2: digital debouncer
1
1
11-4
2
Clock filter
RegEvn[4]
RegEvn[0]
256 Hz
Default mapping in the
8 kHz
1
event manager
1
2
XE8801A – SX8801R
www.semtech.com

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