A80386DX16 Intel, A80386DX16 Datasheet - Page 25

IC MPU 32-BIT 5V 16MHZ 132-PGA

A80386DX16

Manufacturer Part Number
A80386DX16
Description
IC MPU 32-BIT 5V 16MHZ 132-PGA
Manufacturer
Intel
Datasheet

Specifications of A80386DX16

Processor Type
386DX
Features
32-bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-PGA
Family Name
Intel386 DX
Device Core Size
32b
Frequency (max)
16MHz
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
132
Package Type
PGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
807050

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
A80386DX16
Manufacturer:
INTEL
Quantity:
629
string moves) When an interrupt occurs the proces-
sor reads an 8-bit vector supplied by the hardware
which identifies the source of the interrupt (one of
224 user defined interrupts) The exact nature of the
interrupt sequence is discussed in section 5
The IF bit in the EFLAG registers is reset when an
interrupt is being serviced This effectively disables
servicing additional interrupts during an interrupt
service routine However the IF may be set explicitly
by the interrupt handler to allow the nesting of inter-
rupts When an IRET instruction is executed the
original state of the IF is restored
2 9 4 Non-Maskable Interrupt
Non-maskable interrupts provide a method of servic-
ing very high priority interrupts A common example
of the use of a non-maskable interrupt (NMI) would
be to activate a power failure routine When the NMI
Divide Error
Debug Exception
NMI Interrupt
One Byte Interrupt
Interrupt on Overflow
Array Bounds Check
Invalid OP-Code
Device Not Available
Double Fault
Coprocessor Segment Overrun
Invalid TSS
Segment Not Present
Stack Fault
General Protection Fault
Intel Reserved
Page Fault
Coprocessor Error
Intel Reserved
Two Byte Interrupt
Some debug exceptions may report both traps on the previous instruction and faults on the next instruction
Function
Table 2-5 Interrupt Vector Assignments
Interrupt
Number
17– 31
0 – 255
10
11
12
13
15
14
16
0
1
2
3
4
5
6
7
8
9
DIV IDIV
any instruction
INT 2 or NMI
INT
INTO
BOUND
Any Illegal Instruction
ESC WAIT
Any Instruction That Can
Generate an Exception
ESC
JMP CALL IRET INT
Segment Register Instructions
Stack References
Any Memory Reference
Any Memory Access or Code Fetch
ESC WAIT
INT n
Instruction Which
Can Cause
Exception
input is pulled high it causes an interrupt with an
internally supplied vector value of 2 Unlike a normal
hardware interrupt no interrupt acknowledgment se-
quence is performed for an NMI
While executing the NMI servicing procedure the In-
tel386 DX will not service further NMI requests until
an interrupt return (IRET) instruction is executed or
the processor is reset If NMI occurs while currently
servicing an NMI its presence will be saved for serv-
icing after executing the first IRET instruction The IF
bit is cleared at the beginning of an NMI interrupt to
inhibit further INTR interrupts
2 9 5 Software Interrupts
A third type of interrupt exception for the Intel386
DX is the software interrupt An INT n instruction
causes the processor to execute the interrupt serv-
ice routine pointed to by the nth vector in the inter-
rupt table
Intel386
TM
DX MICROPROCESSOR
Return Address
Instruction
Points to
Faulting
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
NO
NO
NO
NO
NO
ABORT
ABORT
FAULT
TRAP
FAULT
FAULT
FAULT
FAULT
FAULT
FAULT
FAULT
FAULT
FAULT
TRAP
TRAP
TRAP
Type
NMI
25

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