Z8038018FSG Zilog, Z8038018FSG Datasheet - Page 50

• Manufacturer Part Number: Z8038018FSG
• Description: IC 16 BIT Z80 MPU 100-QFP
• Manufacturer: Zilog

Specifications of Z8038018FSG

• Processor Type: Z380
• Features: 16-Bit, High-Performance Enhanced Z80 CPU
• Speed: 18MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Processor Series: Z80380x
• Core: Z380
• Program Memory Size: 64 KB
• Maximum Clock Frequency: 18 MHz
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PS010002-0708
I/O Instruction
IN A, (n)
IN dst,(C)
IN0 dst,(n)
INA(W) dst,(mn)
DDIR IB INA(W) dst,(lmn)
DDIR IW INA(W) dst,(klmn)
Block Input
OUT (n),A
OUT (C),dst
OUT0 (n),dst
OUTA(W) (mn),dst
DDIR IB OUTA(W) (lmn),dst
DDIR IW OUTA(W) (klmn),dst
Block output
CPU ARCHITECTURE (Continued)
External I/O Address Space
External I/O addresses are generated by I/O instructions, except those reserved for on-chip
I/O address space accesses, and can take a variety of forms (Table 2). An I/O read or write
is always one transaction, regardless of the bus size and the type of I/O instruction.
On-chip I/O Address Space
The Z380 MPU's on-chip peripheral functions and a portion of its interrupt functions are
controlled by several on-chip registers, which occupy an On-chip I/O Address Space. This
on-chip I/O address space can be accessed only with the following reserved on-chip I/O
instructions.
When one of these I/O instructions is executed, the Z380 MPU outputs the register address
being accessed in a pseudo transaction of two BUSCLK cycles duration, with the address
signals A31-A8 all at zeros. In the pseudo transaction, all bus control signals are at their
inactive states.
IN0
IN0
OUT0
TSTIO
Table 2. External I/O Addressing Options
A31-A24
00000000
BC31-BC24
00000000
00000000
00000000
k
BC31-BC24
00000000
BC31-BC24
00000000
00000000
00000000
k
BC31-BC24
R, (n)
(n)
(n), R
n
A23-A16
00000000
BC23-BC16
00000000
00000000
l
l
BC23-BC16
00000000
BC23-BC16
00000000
00000000
l
l
BC23-BC16
Address Bus
OTIM
OTIMR
OTDM
OTDMR
A15-A8
Contents of A reg
BC15-BC8
00000000
m
m
m
BC15-BC8
Contents of A reg
BC15-BC8
00000000
m
m
m
BC15-BC8
Z380 Microprocessor
Product Specification
Page 50 of 125
A7-A0
n
BC7-BC0
n
n
n
n
BC7-BC0
n
BC7-BC0
n
n
n
n
BC7-BC0