Z8038018FSG Zilog, Z8038018FSG Datasheet - Page 83

• Manufacturer Part Number: Z8038018FSG
• Description: IC 16 BIT Z80 MPU 100-QFP
• Manufacturer: Zilog

Specifications of Z8038018FSG

• Processor Type: Z380
• Features: 16-Bit, High-Performance Enhanced Z80 CPU
• Speed: 18MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 100-QFP
• Processor Series: Z80380x
• Core: Z380
• Program Memory Size: 64 KB
• Maximum Clock Frequency: 18 MHz
• Operating Supply Voltage: 0 V to 5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Mnemonic
RETN
RST p
cc
000
001
010
011
100
101
110
111
Notes:
Instructions in Italic face are Z380 new instructions, instructions with underline are Z180 original instructions.
I:
N:
X3:
X4:
X5:
(2)
(8):
(9):
(10)
(11):
This instruction may be used with DDIR Immediate instructions.
In Native mode, this instruction uses addresses modulo 65536.
In Extended mode, this instruction pushes PC(31-16) into the stack before pushing PC(15-0) into the stack.
In Extended mode, this instruction pops PC(31-16) from the stack after poping PC(15-0) from the stack.
In Extended mode, this instruction loads 00h into PC(31-16).
In Extended mode, all return instructions pops PCz from the stack after poping PC from the stack.
ee is a signed two’s complement number in the range [-32765, 32770], ee-4 in the opcode provides an effective address of pc+e as PC is
incremented by 4 prior to the addition of e.
eee is a signed two’s complement number in the range [-8388604, 8388611], eee-5 in the opcode provides an effective address of pc+e as
PC is incremented by 5 prior to the addition of e.
RETN loads IFF2 to IFF1.
e is a signed two’s complement number in the range [-127, 128], e-3 in the opcode provides an effective address of pc+e as PC is incremented
by 3 prior to the addition of e.
Condition
NZ (Non-zero)
Z (Zero)
NC (Non-carry)
C (Carry)
PO (Parity Odd), or NV (Non-Overflow)
PE (Parity Even), or V (Overflow)
P (Sign positive), or NS (No sign)
M (Sign negative), or S (Sign)
Symbolic
Operation
Return from NMI
(SP-1)
(SP-2)
SP
PCh
PCl
SP-2
p
0
PCh
PCl
Flags
S Z x H x V N C
• • x • x • • •
• • x • x • • •
P/
t
000
001
010
011
100
101
110
111
76
11
01
11
00H
08H
10H
18H
20H
28H
30H
38H
Opcode
p
543 210
101 101
000 101
t
111
HEX
ED
45
Bytes
# of
2
1
Execute
Page 83 of 125
Time
4+w
2+r
N,X4,(10)
N,X3,X5
Notes