MPC8313VRADDB Freescale Semiconductor, MPC8313VRADDB Datasheet - Page 3

MPU POWERQUICC II PRO 516-PBGA

MPC8313VRADDB

Manufacturer Part Number
MPC8313VRADDB
Description
MPU POWERQUICC II PRO 516-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8313VRADDB

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
267MHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
516-PBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8313E-RDB
Maximum Clock Frequency
400 MHz
Operating Supply Voltage
- 0.3 V to + 1.26 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
16 KB
I/o Voltage
2.5 V
Interface Type
I2C, SPI, UART
Minimum Operating Temperature
- 40 C
Program Memory Type
EEPROM/Flash
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8313VRADDB
Manufacturer:
MOTOLOLA
Quantity:
885
Part Number:
MPC8313VRADDB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1.2
The following interfaces are supported in the MPC8313E: dual UART, dual I
1.3
The security engine is optimized to handle all the algorithms associated with IPSec, IEEE Std 802.11i®,
and iSCSI. The security engine contains one crypto-channel, a controller, and a set of crypto execution
units (EUs). The execution units are as follows:
1.4
The MPC8313E DDR1/DDR2 memory controller includes the following features:
1.5
The MPC8313E PCI controller includes the following features:
Freescale Semiconductor
Data encryption standard execution unit (DEU), supporting DES and 3DES
Advanced encryption standard unit (AESU), supporting AES
Message digest execution unit (MDEU), supporting MD5, SHA1, SHA-224, SHA-256, and
HMAC with any algorithm
One crypto-channel supporting multi-command descriptor chains
Single 16- or 32-bit interface supporting both DDR1 and DDR2 SDRAM
Support for up to 333 MHz
Support for two physical banks (chip selects), each bank independently addressable
64-Mbit to 1-Gbit devices with x8/x16/x32 data ports (no direct x4 support)
Support for one 16-bit device or two 8-bit devices on a 16-bit bus, or one 32-bit device or two
16-bit devices on a 32-bit bus
Support for up to 16 simultaneous open pages
Supports auto refresh
On-the-fly power management using CKE
1.8-/2.5-V SSTL2 compatible I/O
PCI specification revision 2.3 compatible
Single 32-bit data PCI interface operates at up to 66 MHz
PCI 3.3-V compatible (not 5-V compatible)
Support for host and agent modes
On-chip arbitration, supporting three external masters on PCI
Selectable hardware-enforced coherency
DDR Memory Controller
Serial Interfaces
Security Engine
PCI Controller
MPC8313E PowerQUICC
II Pro Processor Hardware Specifications, Rev. 3
2
C, and an SPI interface
Overview
3

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