MC68030FE20C Freescale Semiconductor, MC68030FE20C Datasheet - Page 130

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MC68030FE20C

Manufacturer Part Number
MC68030FE20C
Description
IC MPU 32BIT ENHANCED 132-CQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68030FE20C

Processor Type
M680x0 32-Bit
Speed
20MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-CQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

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5.6.3 Read/Write (R/W)
5.6.4 Read-Modify-Write Cycle (RMC)
5.6.5 Address Strobe (AS)
5.6 BUS CONTROL SIGNALS
5.6.10perand Cycle Start (OCS)
5.6.2 External Cycle Start (ECS)
MOTOROLA
This output signal indicates the beginning of the first external bus cycle for
subsequent cycles that are performed due to dynamic bus sizing or operand
This output signal indicates the beginning of a bus cycle of any type. Refer
to 7.1.1 Bus
This three-state output signal defines the type of bus cycle. A high level
Control Signals
This three-state output signal identifies the current bus cycle as part of an
for information about the relationship of RMC to bus operation.
This three-state output indicates that a valid address is on the address bus.
The function code, size, and read/write signals are also valid when AS is
The following signals control synchronous bus transfer operations for the
an instruction prefetch or a data operand transfer. OCS is not asserted for
misalignment. Refer to 7.1.1 Bus Control Signals for information about the
bus operation.
indicates a read cycle; a low level indicates a write cycle. Refer to 7.1.1 Bus
ation.
indivisible read-modify-write operation; it remains asserted during all bus
cycles of the read-modify-write operation. Refer to 7.1.1 Bus
asserted. Refer to 7.1.3
of AS to bus operation.
MC68030.
relationship of OCS to bus operation.
Control Signals
for information about the relationship of R/W to bus oper-
m
Address Strobe
MC68030 USER'S MANUAL
for information about the relationship of ECS to
for information about the relationship
Control Signals
5-5
5

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