MC68030FE20C Freescale Semiconductor, MC68030FE20C Datasheet - Page 486

• Manufacturer Part Number: MC68030FE20C
• Description: IC MPU 32BIT ENHANCED 132-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68030FE20C

• Processor Type: M680x0 32-Bit
• Speed: 20MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-CQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

MOTOROLA
A similar analysis can be constructed for the average no-cache case. Since
the average no-cache-case time assumes two clock periods per bus cycle
formula:
systems with wait states. To approximate the average no-cache-case time
for an instruction or effective address with W wait states, use the following
where:
The average no-cache-case timing obtained from this formula is equal to or
greater than the actual no-cache-case timing since the number of instruction
up) and no overlap is assumed.
Using the general Equation (11-2), calculate as follows:
(i.e., no wait states), the timing given in the tables does not apply directly to
accesses used is a maximum (the values in the tables are always rounded
The number of data reads, data writes, and maximum instruction accesses
Execution Time = CCeal + [CCoPl - min(Heal,TOPl )] + [CCea2 - min(Hea2;TOPl l] +
are found in the appropriate table.
NCCt is the
no-cache-case
NCC = NCCt+ (# of data reads and writes)oW+
= 3 + [2 ~ min(0,1 )]m + [12 - min(4,0)] +
= 45 clock periods
3+2+12+5+1+6+2+14
[CCoP2- min(HoP2,Tea2) ] + [CCea 3- min(Hea3,ToP2)] +
[CCoP3 - min(HoP3,Tea3) ] + [CCea 4- min(Hea4,ToP3)] +
[CCoP4- min(HoP4,Tea4) ]
[5- min(O,O)] + [2 - rain(I,3)] ~-
[6- min(2,0)] + [2 - min(O,2)] ~-
[14- min(3,0)
(max. # of instruction accesses)oW
MC68030 USER'S MANUAL
timing value from the
appropriate
table.
11-23