MPC8347EVVALFB Freescale Semiconductor, MPC8347EVVALFB Datasheet - Page 67

IC MPU POWERQUICC II 672-TBGA

MPC8347EVVALFB

Manufacturer Part Number
MPC8347EVVALFB
Description
IC MPU POWERQUICC II 672-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II PROr
Datasheets

Specifications of MPC8347EVVALFB

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
667MHz
Voltage
1.3V
Mounting Type
Surface Mount
Package / Case
672-TBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8349E-MITXE
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
667MHz
Embedded Interface Type
I2C, SPI, USB, UART
Digital Ic Case Style
TBGA
No. Of Pins
672
Rohs Compliant
Yes
Family Name
MPC83xx
Device Core
PowerQUICC II Pro
Device Core Size
32b
Frequency (max)
667MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.3V
Operating Supply Voltage (max)
1.36V
Operating Supply Voltage (min)
1.24V
Operating Temp Range
0C to 105C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
672
Package Type
TBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Table 52
Freescale Semiconductor
NC
Notes:
1. This pin is an open-drain signal. A weak pull-up resistor (1 kΩ) should be placed on this pin to OV
2. This pin is an open-drain signal. A weak pull-up resistor (2–10 kΩ) should be placed on this pin to OV
3. During reset, this output is actively driven rather than three-stated.
4. These JTAG pins have weak internal pull-up P-FETs that are always enabled.
5. This pin should have a weak pull-up if the chip is in PCI host mode. Follow the PCI specifications.
6. This pin must always be tied to GND.
7. This pin must always be pulled up to OV
8. This pin must always be left not connected.
9. Thermal sensitive resistor.
10.It is recommended that MDIC0 be tied to GRD using an 18 Ω resistor and MDIC1 be tied to DDR power using an 18 Ω
11.TSEC1_TXD[3] is required an external pull-up resistor. For proper functionality of the device, this pin must be pulled up or
PCI1_INTA/IRQ_OUT
PCI1_RESET_OUT
PCI1_AD[31:0]
PCI1_C/BE[3:0]
PCI1_PAR
PCI1_FRAME
PCI1_TRDY
resistor.
actively driven high during a hard reset. No external pull-down resistors are allowed to be attached to this net.
provides the pinout listing for the MPC8347E, 620 PBGA package.
MPC8347E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 11
Signal
Signal
Table 51. MPC8347E (TBGA) Pinout Listing (continued)
Table 52. MPC8347E (PBGA) Pinout Listing
DD
.
W32, AA31, AA32, AA33, AA34,
AB31, AB32, AB33, AB34, AC29,
AC31, AC33, AC34, AD30, AD32,
AD33, AD34, AE29, AE30, AH32,
AH33, AH34, AM33, AJ31, AJ32,
AJ33, AJ34, AK32, AK33, AK34,
AM34, AL33, AL34, AK31, AH30,
AC32, AE32, AH31, AL32, AG34,
AE33, AF32, AE34, AF34, AF33,
AG33, AG32, AL11, AM11, AP10, Y32,
Y34, Y31, Y33
D20
B21
E19, D17, A16, A18, B17, B16, D16,
B18, E17, E16, A15, C16, D15, D14,
C14, A12, D12, B11, C11, E12, A10,
C10, A9, E11, E10, B9, B8, D9, A8,
C9, D8, C8
A17, A14, A11, B10
D13
B14
A13
No Connection
Package Pin Number
Package Pin Number
PCI
Pin Type
Pin Type
I/O
I/O
I/O
I/O
I/O
O
O
DD
.
DD
Supply
Supply
Power
Power
OV
OV
OV
OV
OV
OV
OV
.
DD
DD
DD
DD
DD
DD
DD
Notes
Notes
2
5
5
67

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