MC68020CRC25E Freescale Semiconductor, MC68020CRC25E Datasheet - Page 135

• Manufacturer Part Number: MC68020CRC25E
• Description: IC MICROPROCESSOR 32BIT 114-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68020CRC25E

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 114-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

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tracing is enabled, the trace exception processing should also be emulated for the trace
exception handler to account for the emulated instruction.
The exception processing for a trace starts at the end of normal processing for the traced
instruction and before the start of the next instruction. The processor makes an internal
copy of the SR and enters the supervisor privilege level (by setting the S-bit in the SR). It
also clears the T0 and T1 bits of the SR, disabling further tracing. The processor supplies
vector number 9 for the trace exception and saves the trace exception vector offset, PC
value, and the copy of the SR on the supervisor stack. The saved value of the PC is the
logical address of the next instruction to be executed. Instruction execution resumes after
the required prefetches from the address in the trace exception vector.
The STOP instruction does not perform its function when it is traced. A STOP instruction
that begins execution with T1, T0 = 10 forces a trace exception after it loads the SR. Upon
return from the trace handler routine, execution continues with the instruction following the
STOP instruction, and the processor never enters the stopped condition.
6.1.8 Format Error Exception
Just as the processor checks that prefetched instructions are valid, the processor (with the
aid of a coprocessor, if needed) also performs some checks of data values for control
operations, including the type and option fields of the descriptor for CALLM, the
coprocessor state frame format word for a cpRESTORE instruction, and the stack frame
format for an RTE or an RTM instruction.
The RTE instruction checks the validity of the stack format code. For long bus fault format
frames, the RTE instruction also compares the internal version number of the processor to
that contained in the frame at memory location SP + 54 (SP + $36). This check ensures
that the processor can correctly interpret internal state information from the stack frame.
The CALLM and RTM both check the values in the option and type fields in the module
descriptor and module stack frame, respectively. If these fields do not contain proper
values or if an illegal access rights change request is detected by an external memory
management unit, then an illegal call or return is being requested and is not executed.
Refer to Section 9 Applications Information for more information on the module
call/return mechanism.
The cpRESTORE instruction passes the format word of the coprocessor state frame to the
coprocessor for validation. If the coprocessor does not recognize the format value, it
signals the MC68020/EC020 to take a format error exception. Refer to Section 7
Coprocessor Interface Description for details of coprocessor-related exceptions.
If any of the checks previously described determine that the format of the stacked data is
improper, the instruction generates a format error exception. This exception saves a short
bus fault stack frame, generates exception vector number 14, and continues execution at
the address in the format exception vector. The stacked PC value is the logical address of
the instruction that detected the format error.
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M68020 USER’S MANUAL
MOTOROLA
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