CS42436-DMZ Cirrus Logic Inc, CS42436-DMZ Datasheet - Page 9

IC CODEC 108DB 192KHZ 52-MQFP

CS42436-DMZ

Manufacturer Part Number
CS42436-DMZ
Description
IC CODEC 108DB 192KHZ 52-MQFP
Manufacturer
Cirrus Logic Inc
Type
Audio Codecr
Datasheet

Specifications of CS42436-DMZ

Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
6 / 6
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
105 / 108 (Differential), 102 / 105 (Single-Ended)
Voltage - Supply, Analog
3.14 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
52-MQFP, 52-PQFP
Audio Codec Type
Stereo
No. Of Adcs
6
No. Of Dacs
6
No. Of Input Channels
6
No. Of Output Channels
6
Adc / Dac Resolution
24bit
Sampling Rate
200kSPS
Ic Interface Type
I2C
Package
52MQFP
Adc/dac Resolution
24 Bit
Number Of Channels
6ADC /6 DAC
Number Of Dacs
6
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
598-1613

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DS647F2
2. PIN DESCRIPTIONS - HARDWARE MODE
AIN5_MUX
AIN6_MUX
MFREQ
ADC3_HPF
RST
VLC
FS
VD
DGND
VLS
SCLK
MCLK
ADC_SDOUT
ADC_SINGLE
DAC_SDIN
Pin Name
9,18
10
12
13
14
11
#
1
2
3
4
5
6
7
8
ADC3_SINGLE
Analog Input Multiplexer
ADC3.
MCLK Frequency (Input) - Sets the required frequency range of the input Master Clock.
ADC3 High-Pass Filter Freeze (Input) - When this pin is driven high, the internal high-pass filter
will be disabled for ADC3.The current DC offset value will be frozen and continue to be subtracted
from the conversion result.
Reset (Input) - The device enters a low-power mode and all internal registers are reset to their
default settings when low.
Control Port Power (Input) - Determines the required signal level for the control port interface.
See
Frame Sync (Input) - Signals the start of a new TDM frame in the TDM digital interface format.
Digital Power (Input) - Positive power supply for the digital section.
Digital Ground (Input) - Ground reference for the digital section.
Serial Port Interface Power (Input) - Determines the required signal level for the serial port inter-
faces. See
Serial Clock (Input) - Serial clock for the serial audio interface. Input frequency must be 256 x Fs.
Master Clock (Input) - Clock source for the delta-sigma modulators and digital filters.
Serial Audio Data Output (Output) - TDM output for two’s complement serial audio data. Start-up
Option for Hardware Mode: Pull-up to VLS enables Single-Ended Mode for AIN5-AIN6.
DAC Serial Audio Data Input (Input) - TDM Input for two’s complement serial audio data.
ADC_SDOUT/
ADC3_HPF
AIN5_MUX
AIN6_MUX
“Digital I/O Pin Characteristics” on page
MFREQ
DGND
MCLK
SCLK
RST
VLC
VLS
VD
FS
“Digital I/O Pin Characteristics” on page
1
2
3
4
5
6
7
8
9
10
11
12
13
52 51 50 49 48 47 46 45 44 43 42 41
14 15 16 17 18 19 20 21 22 23 24 25
(Input) -
CS42436
Allows selection between the A and B single-ended inputs of
Pin Description
8.
8.
40
26
39
38
37
36
35
34
33
32
31
30
29
28
27
AIN1+
AIN1-
VA
VQ
AGND
TSTO
TSTO
TSTO
TSTO
AOUT6-
AOUT6+
AOUT5+
AOUT5-
CS42436
9

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