LTC4259ACGW-1#PBF Linear Technology, LTC4259ACGW-1#PBF Datasheet - Page 15

IC CTRLR POE QUAD AC DISC 36SSOP

LTC4259ACGW-1#PBF

Manufacturer Part Number
LTC4259ACGW-1#PBF
Description
IC CTRLR POE QUAD AC DISC 36SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4259ACGW-1#PBF

Controller Type
Power over Ethernet Controller (POE)
Interface
I²C
Voltage - Supply
3 V ~ 4 V
Current - Supply
2.5mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
36-SSOP
Linear Misc Type
Negative Voltage
Family Name
LTC4259A
Package Type
SSOP
Operating Supply Voltage (min)
-48V
Operating Supply Voltage (max)
-57V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
36
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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APPLICATIO S I FOR ATIO
The LTC4259A-1 provides a complete solution for detec-
tion and powering of PD devices in an IEEE 802.3af
compliant system. The LTC4259A-1 consists of four inde-
pendent ports, each with the ability to detect, classify, and
provide isolated –48V power to a PD device connected to
it. The LTC4259A-1 senses removal of a PD with IEEE
802.3af compliant AC or DC methods and turns off –48V
power when the PD is removed. An internal control circuit
takes care of system configuration and timing, and uses an
I
OPERATING MODES
Each LTC4259A-1 port can operate in one of four modes:
Manual, Semiauto, Auto or Shutdown. The operating
mode for a port is set by the appropriate bits in the
Operating Mode register. The LTC4259A-1 will power up
with all ports in Shutdown mode if the external AUTO pin
is tied low; if AUTO is high, all ports will wake up in Auto
mode. The operating mode can be changed at any time via
the I
• In Manual mode, a port will wait for instructions from
• In Semiauto mode, the port will repeatedly attempt to
• In Auto mode, the port will detect and classify a PD
• In Shutdown mode, the port is disabled and will not detect
2
C interface to communicate with the host system.
the host system before taking any action. It will run
single detection or classification cycles when com-
manded, and will report results in the Port Status
registers. When the host system decides it is time to
turn on or off power to a port, it can do so by setting
the appropriate Power On/Off bits in the Power Enable
PB register regardless of the current status of detec-
tion or classification.
detect and classify a PD device attached to the link. It
will report this information in its Port Status register,
and wait for the host system to set the appropriate
Power On bit in the Power Enable PB register before
applying power to the port.
device connected to it, then immediately turn on the
power if detection was successful regardless of the
result of classification.
or power a PD. Also, the detect and fault event bits, status
bits and enable bits for the port are reset to zero.
2
C interface, regardless of the state of the AUTO pin.
U
U
W
U
Regardless of which mode it is in, the LTC4259A-1 will
remove power automatically from any port that generates
a t
and t
remove power from any port that generates a disconnect
event if the appropriate Disconnect Enable bit is set in the
Disconnect Enable register. The host controller may also
remove power at any time by setting the appropriate
Power Off bit in the Power Enable PB register.
Power-On RESET
At turn-on or any time the LTC4259A-1 is reset (either by
pulling the RESET pin low or writing to the global Reset All
bit), all the ports turn off and all internal registers go to a
predefined state, shown in Table 1.
Several of the registers assume different states based on
the state of the AUTO pin at reset. The default states with
AUTO high allow the LTC4259A-1 to detect and power up
a PD in Automatic mode, even if nothing is connected to
the I
SIGNATURE DETECTION
The IEEE defines a specific pair-to-pair PD signature
resistance that identifies a device that can accept Power
over Ethernet in accordance with the 802.3af specifica-
tion. When the port voltage is below 10V, an 802.3af
compliant PD will have a 25k signature resistance. Figure
12 illustrates the relationship between the PD signature
resistance (white box from 23.75k to 26.25k) and required
resistance ranges the PSE must accept (white box) and
reject (gray boxes). According to the 802.3af specifica-
tion, the PSE may or may not accept resistances in the two
ranges of 15k to 19k and 26.5k to 33k. Note that the black
box in Figure 12 represents the 150Ω pair-to-pair termina-
tion used in legacy 802.3 devices like a computer’s net-
work interface card (NIC) that cannot accept power.
RESISTANCE
START
2
Figure 12. IEEE 802.3af Signature Resistance Ranges
START
C interface.
PSE
PD
or t
0Ω
150Ω (NIC)
ICUT
Timing sections). It will also automatically
overcurrent fault event (see t
10k
15k
20k
19k
LTC4259A-1
23.75k
26.25k
26.5k
30k
ICUT
33k
15
Timing
4259a1fa
4259A F12

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