LTC4259ACGW-1#PBF Linear Technology, LTC4259ACGW-1#PBF Datasheet - Page 16

IC CTRLR POE QUAD AC DISC 36SSOP

LTC4259ACGW-1#PBF

Manufacturer Part Number
LTC4259ACGW-1#PBF
Description
IC CTRLR POE QUAD AC DISC 36SSOP
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4259ACGW-1#PBF

Controller Type
Power over Ethernet Controller (POE)
Interface
I²C
Voltage - Supply
3 V ~ 4 V
Current - Supply
2.5mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
36-SSOP
Linear Misc Type
Negative Voltage
Family Name
LTC4259A
Package Type
SSOP
Operating Supply Voltage (min)
-48V
Operating Supply Voltage (max)
-57V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
36
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC4259ACGW-1#PBFLTC4259ACGW-1
Manufacturer:
LT
Quantity:
39 000
Company:
Part Number:
LTC4259ACGW-1#PBFLTC4259ACGW-1
Manufacturer:
MURATA
Quantity:
3 942
Company:
Part Number:
LTC4259ACGW-1#PBFLTC4259ACGW-1
Manufacturer:
LT
Quantity:
20 000
Company:
Part Number:
LTC4259ACGW-1#PBFLTC4259ACGW-1 TR
Quantity:
5 700
Company:
Part Number:
LTC4259ACGW-1#PBFLTC4259ACGW-1#
Manufacturer:
LT
Quantity:
20 000
APPLICATIO S I FOR ATIO
Table 2. IEEE 802.3af Powered Device Classes
LTC4259A-1
The LTC4259A-1 checks for the signature resistance by
forcing two test currents on the port (via the DETECT n
pins) in sequence and measuring the resulting voltages. It
then subtracts the two V-I points to determine the resistive
slope while removing voltage offset caused by any series
diodes or current offset caused by leakage at the port (see
Figure 13). The LTC4259A-1 will typically accept any PD
resistance between 17k and 29k as a valid PD and report
Detect Good (100 binary) in the Detect Status bits (bits 2
through 0) of the corresponding Port Status register.
Values outside this range, including open and short cir-
cuits, are also reported in the Detect Status bits. Refer to
Table 1 for a complete decoding of the Detect Status bits.
The first test point is taken by forcing a test current into
the port, waiting a short time to allow the line to settle and
measuring the resulting voltage. This result is stored and
the second current is applied to the port, allowed to settle
and the voltage measured. Each point takes about
100ms to measure, and an entire detection cycle takes
230ms (max).
16
IEEE 802.3af
CLASS
0
1
2
3
4
275
165
OFFSET
0V-2V
VALID PD
CURRENT AT PSE
CLASSIFICATION
Figure 13. PD Detection
16mA to 21mA
25mA to 31mA
35mA to 45mA
8mA to 13mA
U
0mA to 5mA
VOLTAGE
25kΩ SLOPE
U
DETECTION
SECOND
POINT
W
DETECTION
PD POWER
MAXIMUM
12.95W
12.95W
12.95W
POINT
FIRST
3.84W
6.49W
4259A F13
U
OUTPUT POWER
MINIMUM PSE
15.4W
15.4W
15.4W
4W
7W
The LTC4259A-1 will not report Detect Good if the PD has
more than 5µF in parallel with its signature resistor.
The port’s operating mode controls if and when the
LTC4259A-1 runs a detection cycle. In manual mode, the
port will sit idle until a Restart Detection (register 18h)
command is received. It will then run a complete 200ms
detection cycle on the selected port, report the results in
the Detect Status bits in the corresponding Port Status
register and return to idle until another command is
received. In Semiauto mode, the LTC4259A-1 autono-
mously tests valid PDs connected to the ports but it will not
apply power until instructed to do so by the host controller.
It repeatedly queries the port every 320ms and updates the
Detect Status bits at the end of each cycle. If a Detect Good
is reported, it will advance to the classification phase and
report that result in the Port Status register. Until in-
structed to do otherwise, the LTC4259A-1 will continue to
repeat detection on the port. Behavior in Auto mode is
similar to Semiauto; however, after a Detect Good is
reported, the LTC4259A-1 performs the classification
phase and then powers up the port without further inter-
vention.
The signature detection circuitry is disabled when the port
is in Shutdown mode, powered up or the corresponding
Detect Enable bit is cleared.
CLASSIFICATION
A PD has the option of presenting a “classification signa-
ture” to the PSE to indicate how much power it will draw
when powered up. This signature consists of a specific
constant current draw when the PSE port voltage is between
15.5V and 20.5V, with the current level indicating the power
class to which the PD belongs. Per the IEEE 802.3af speci-
fication, the LTC4259A-1 identifies the five classes of PD
CLASS DESCRIPTION
PD Does Not Implement Classification, Unknown Power
Low Power PD
Medium Power PD
High or Full Power PD
Reserved, Power as Class O
4259a1fa

Related parts for LTC4259ACGW-1#PBF