UJA1076TW/3V3/WD:1 NXP Semiconductors, UJA1076TW/3V3/WD:1 Datasheet - Page 18

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UJA1076TW/3V3/WD:1

Manufacturer Part Number
UJA1076TW/3V3/WD:1
Description
IC SBC CAN HS 3.3V 32HTSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of UJA1076TW/3V3/WD:1

Controller Type
System Basis Chip
Interface
SPI
Voltage - Supply
4.5 V ~ 28 V
Current - Supply
82µA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
32-TSSOP Exposed Pad, 32-eTSSOP, 32-HTSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
UJA1076_2
Product data sheet
6.6.1 Battery pin (BAT)
6.6.2 Voltage regulator V1
6.6 Power supplies
The SBC contains a single supply pin, BAT. An external diode is needed in series to
protect the device against negative voltages. The operating range is from 4.5 V to 28 V.
The SBC can handle maximum voltages up to 40 V.
If the voltage on pin BAT falls below the power-off detection threshold (V
SBC immediately enters Off mode, which means that the voltage regulators and the
internal logic are shut down. The SBC leaves Off mode for Standby mode as soon as the
voltage rises above the power-on detection threshold, V
Int_Status register is set to 1 when the SBC leaves Off mode.
Voltage regulator V1 is intended to supply the microcontroller, its periphery and additional
transceivers. V1 is supplied by pin BAT and delivers up to 250 mA at 3.3 V or 5 V
(depending on the UJA1076 version).
To prevent the device overheating at high ambient temperatures or high average currents,
an external PNP transistor can be connected as illustrated in
configuration, the power dissipation is distributed between the SBC and the PNP
transistor. Bit PDC in the Mode_Control register
power dissipation is distributed − if PDC = 0, the PNP transistor will be activated when the
load current reaches 85 mA (50 mA if PDC = 1) at T
85 mA while the transistor delivers the additional load current (see
Fig 6.
External PNP transistor control circuit
battery
All information provided in this document is subject to legal disclaimers.
Rev. 02 — 27 May 2010
BAT
High-speed CAN core system basis chip
UJA107x
VEXCTRL
(Table
vj
= 150 °C. V1 will continue to deliver
015aaa098
VEXCC
5) is used to regulate how the
th(det)pon
V1
Figure
. The POSI bit in the
Figure 7
6. In this
UJA1076
© NXP B.V. 2010. All rights reserved.
th(det)poff
and
Figure
), the
18 of 47
8).

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