SC18IM700IPW,112 NXP Semiconductors, SC18IM700IPW,112 Datasheet
SC18IM700IPW,112
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935280629112
SC18IM700IPW
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SC18IM700IPW,112 Summary of contents
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SC18IM700 Master I Rev. 02 — 10 August 2007 1. General description The SC18IM700 is designed to serve as an interface between the standard UART port of a microcontroller or microprocessor and the serial I or microprocessor to communicate directly ...
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... NXP Semiconductors 4. Ordering information Table 1. Type number SC18IM700IPW 5. Block diagram Fig 1. Block diagram of SC18IM700 SC18IM700_2 Product data sheet Master I Ordering information Package Name Description TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SC18IM700 RX TX UART RESET WAKEUP Rev. 02 — 10 August 2007 ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Pin configuration for TSSOP16 6.2 Pin description Table 2. Symbol GPIO0 GPIO1 RESET V SS GPIO2 GPIO3 SDA SCL RX TX GPIO6 V DD WAKEUP GPIO5 GPIO4 GPIO7 SC18IM700_2 Product data sheet Master I 1 GPIO0 GPIO1 2 RESET ...
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... NXP Semiconductors 7. Functional description The SC18IM700 is a bridge between a UART port and I consists of a full-functional advanced UART. The UART communicates with the host through the TX and RX pins. The serial data format is fixed: one start bit, 8 data bits, and one stop bit. After reset the baud rate defaults to 9600 bit/s, and can be changed through the Baud Rate Generator (BRG) registers ...
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... NXP Semiconductors Fig 3. Write N bytes to slave device 7.1.2 Read N byte from slave device The host issues the read command by sending an S character followed slave device address, and the total number of bytes to be read from the addressed 2 I C-bus slave. The frame is then terminated with a P character. Once the host issues this ...
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... NXP Semiconductors 7.1.4 Read from 18IM internal register The host issues the internal register read command by sending an R character followed by the registers to be read. The frame is then terminated with a P character. Once the command is issued, SC18IM700 will access its internal registers and returns the contents of these registers to the host ...
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... NXP Semiconductors Fig 9. Repeated START: read after write 7.1.8 Repeated START: write after write The SC18IM700 also supports ‘write after write’ command as specified in the NXP Semiconductors I write command without having to issue a STOP condition between the two commands. The host issues a write command as normal, then immediately issues a second write command without sending a STOP (P) character after the fi ...
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... NXP Semiconductors C-bus serial interface 2 The I C-bus uses two wires (SDA and SCL) to transfer information between devices connected to the bus, and it has the following features: • Bidirectional data transfer between masters and slaves • Multi-master bus (no central master) • Arbitration between simultaneously transmitting masters without corruption of serial data on the bus • ...
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Register summary Table 4. Internal registers summary Register Register Bit 7 Bit 6 address General register set 0x00 BRG0 bit 7 bit 6 0x01 BRG1 bit 7 bit 6 0x02 PortConf1 GPIO3.1 GPIO3.0 0x03 PortConf2 GPIO7.1 GPIO7.0 0x04 IOState ...
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... NXP Semiconductors 9.2 Register descriptions 9.2.1 Baud Rate Generator (BRG) The baud rate generator is an 8-bit counter that generates the data rate for the transmitter and the receiver. The rate is programmed through the BRG register and the baud rate can be calculated as follows: Baud rate Remark: To calculate the baud rate the values in the BRG registers must fi ...
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... NXP Semiconductors pin latch data Fig 13. Quasi-bidirectional output configuration 9.2.2.2 Input-only configuration The input-only port configuration has no output drivers Schmitt triggered input that also has a glitch suppression circuit. Fig 14. Input-only configuration 9.2.2.3 Push-pull output configuration The push-pull output configuration has the same pull-down structure as both the open-drain and the quasi-bidirectional output modes, but provides a continuous strong pull-up when the port latch contains a logic 1 ...
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... NXP Semiconductors 9.2.2.4 Open-drain output configuration The open-drain output configuration turns off all pull-ups and only drives the pull-down transistor of the port driver when the port latch contains a logic used as a logic output, a port configured in this manner must have an external pull-up, typically a resistor ...
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... NXP Semiconductors Table 7. I2CClk (I2CClkH + I2CClkL) 10 (minimum 100 Remark: The numbers used in the formulas are in decimal, but the numbers to program I2CClkH and I2CClkL are in hex. 2 9.2.6 I C-bus time-out (I2CTO) The time-out register is used to determine the maximum time that SCL is allowed to be ...
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... NXP Semiconductors 10. Limiting values Table 10. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol T amb(bias) T stg OH(I/O) I OL(I/O) I I/O(tot)(max) P /pack tot [1] This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static charge. Nonetheless suggested that conventional precautions be taken to avoid applying greater than the rated maximum ...
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... NXP Semiconductors 11. Static characteristics Table 11. Static characteristics +85 C; unless otherwise specified. DD amb Symbol Parameter I supply current DD V power-on reset voltage POR V negative-going threshold th(HL) voltage V LOW-level input voltage IL V positive-going threshold th(LH) voltage V HIGH-level input voltage SCL, SDA only ...
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... NXP Semiconductors 12. Dynamic characteristics 2 Table 12. I C-bus timing characteristics All the timing limits are valid within the operating supply voltage and ambient temperature range +85 C; and refer to V amb Symbol Parameter f SCL clock frequency SCL t bus free time between a STOP and START ...
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... NXP Semiconductors 13. Package outline TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 14. Soldering This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 14.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 14.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... Release date SC18IM700_2 20070810 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table 4 “Internal registers SC18IM700_1 20060228 ...
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... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...
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... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 4 7.1 UART message format . . . . . . . . . . . . . . . . . . . 4 7.1.1 Write N bytes to slave device . . . . . . . . . . . . . . 4 7.1.2 Read N byte from slave device . . . . . . . . . . . . . 5 7 ...