SAF82532N10V32A Infineon Technologies, SAF82532N10V32A Datasheet - Page 171

• Manufacturer Part Number: SAF82532N10V32A
• Description: IC CONTROLLER 2-CH SER 68-PLCC
• Manufacturer: Infineon Technologies

Specifications of SAF82532N10V32A

• Controller Type: Serial Communications Controller (SCC)
• Interface: Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 8mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Other names: SAF82532N10V32A; SAF82532N10V32AIN

Version 3.x:
TIMR Timer Register (READ/WRITE) is unchanged. However the input to the Timer
function can be optionally selected to be XTAL/4 in Master clock mode by setting
CCR0:MCE = ‘1’ and CCR4:MCK4 = ‘1’.
VALUE …
Non Master Clock Mode (CCR0:MCE = ‘0’)
Master Clock Mode (CCR0:MCE = ‘1’)
With CCR4:MCK4 = ‘1’ in master clock mode, XTAL clock divide-by-4 is fed to the timer
block. The XTAL clock feeds the baud rate generator which is used to select the transmit
and received baud rate and generates the 16- oversampling clock. By this means, a
XTAL clock of 30 MHz can be used while maintaining the Core logic’s clock operation
limit of 10 MHz.
CNT …
Semiconductor Group
(5 bits) sets the time period
With CCR4:MCK4 = ‘0’ and default condition, the timer value is
given by the equation
t
where
– k is the timer resolution factor which is either 32 768
– TCP is the clock period of the Timer Clock.
Timer Clock Period (TCP) = Transmit Clock Period
if CCR4:MCK4 = ‘0’ (Reset state)
Timer Clock Period (TCP) = XTAL Clock Period
if CCR4:MCK4 = ‘1’
Timer Clock Period (TCP) = XTAL Clock Period/4
(3 bits) The CNT function is unchanged.
1
= k
(if MODE:TRS = ‘0’) or 512 (if MODE:TRS = ‘1’) clock cycles.
(VALUE + 1)
171
TCP
t
1
as follows:
Detailed Register Description
SAB 82532/SAF 82532
ASYNC Mode
07.96