ADM7001X-AC-T-1 Infineon Technologies, ADM7001X-AC-T-1 Datasheet - Page 35

• Manufacturer Part Number: ADM7001X-AC-T-1
• Description: IC SWITCH CTRLR 10/100 48LQFP
• Manufacturer: Infineon Technologies

Specifications of ADM7001X-AC-T-1

• Controller Type: Ethernet Switch Controller
• Interface: Serial
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 115°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• For Use With: EASY7001MIIIN - BOARD EVALUATION ADM7001
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: ADM7001XACT1; ADM7001XACT1; ADM7001XACT1X; ADM7001XACT1X; ADM7001XACT1XP; SP000076255

Figure 5
3.2.2
Figure 6
sense is detected, which causes CRSDV to assert asynchronously to REFCLK. The received data is then placed
into the FIFO for resynchronization. After a minimum of 12 bits are placed into the FIFO, the received data is
presented onto RXD[1:0] synchronously to REFCLK. Note that while the FIFO is filling up RXD[1:0] is set to 00
until the first received di-bit of preamble (01) is presented onto RXD[1:0]. When carrier sense is de-asserted at the
end of a packet, CRSDV is de-asserted when the first di-bit of a nibble is presented onto RXD[1:0] synchronously
to REFCLK. If there is still data in the FIFO that has not yet been presented onto RXD[1:0], then on the second di-
bit of a nibble, CRSDV reasserts. This pattern of assertion and de-assertion continues until all received data in the
FIFO has been presented onto RXD[1:0]. RXER is inactive for the duration of the received valid packet.
Figure 7
CRSDV is asserted asynchronously to REFCLK as in the valid receive case shown in . However, once false carrier
is detected, RXD[1:0] is changed to (10) (11) (Value 1110 in MII) and RXER is asserted. Both RXD[1:0] and RXER
transition synchronously to REFCLK. After carrier sense is de-asserted, CRSDV is de-asserted synchronously to
REFCLK.
Figure 6
Data Sheet
shows the relationship among REFCLK, CRSDV, RXD and RXER while receiving a valid packet. Carrier
shows the relationship among REFCLK, CRSDV and RXD[1:0] during a received false carrier event.
RMII Signal Diagram
Receive Path for 100M
RMII Reception Without Error
35
Function Description
Rev. 1.07, 2005-11-25
ADM7001/X
Data sheet