PIC18F2550-I/SP Microchip Technology Inc., PIC18F2550-I/SP Datasheet - Page 195

• Manufacturer Part Number: PIC18F2550-I/SP
• Description: Microcontroller; 32 KB Flash; 2048 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2550-I/SP

• A/d Inputs: 10-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 12 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 23
• Interface: I2C/SPI/USART/USB
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 48 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

19.0
19.1
The Master Synchronous Serial Port (MSSP) module is
a serial interface, useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers,
display drivers, A/D converters, etc. The MSSP module
can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
The I
hardware:
• Master mode
• Multi-Master mode
• Slave mode
19.2
The MSSP module has three associated control regis-
ters. These include a status register (SSPSTAT) and
two control registers (SSPCON1 and SSPCON2). The
use of these registers and their individual Configuration
bits differ significantly depending on whether the MSSP
module is operated in SPI or I
Additional details are provided under the individual
sections.
© 2006 Microchip Technology Inc.
- Full Master mode
- Slave mode (with general address call)
2
C interface supports the following modes in
MASTER SYNCHRONOUS
SERIAL PORT (MSSP)
MODULE
Master SSP (MSSP) Module
Overview
Control Registers
2
C™)
2
C mode.
PIC18F2455/2550/4455/4550
Preliminary
19.3
The SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. All four
modes of the SPI are supported. To accomplish
communication, typically three pins are used:
• Serial Data Out (SDO) – RC7/RX/DT/SDO
• Serial Data In (SDI) – RB0/AN12/INT0/FLT0/SDI/SDA
• Serial Clock (SCK) – RB1/AN10/INT1/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RA5/AN4/SS/HLVDIN/C2OUT
Figure 19-1 shows the block diagram of the MSSP
module when operating in SPI mode.
FIGURE 19-1:
Note:
SCK
SDO
SDI
SS
SPI Mode
Only those pin functions relevant to SPI
operation are shown here.
Read
SS Control
Enable
SMP:CKE
MSSP BLOCK DIAGRAM
(SPI MODE)
bit0
Select
Select
Edge
Edge
SSPM3:SSPM0
SSPBUF reg
2
SSPSR reg
TRIS bit
Data to TX/RX in SSPSR
Clock Select
4
DS39632C-page 193
2
(
Prescaler
4, 16, 64
TMR2 Output
Write
Clock
Shift
2
Internal
Data Bus
T
OSC
)