PIC18F2550-I/SP Microchip Technology Inc., PIC18F2550-I/SP Datasheet - Page 266

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PIC18F2550-I/SP

Manufacturer Part Number
PIC18F2550-I/SP
Description
Microcontroller; 32 KB Flash; 2048 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F2550-I/SP

A/d Inputs
10-Channel, 10-Bit
Comparators
2
Cpu Speed
12 MIPS
Eeprom Memory
256 Bytes
Input Output
23
Interface
I2C/SPI/USART/USB
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Speed
48 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2550-I/SP
Manufacturer:
MICROCHIP
Quantity:
2 100
PIC18F2455/2550/4455/4550
21.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 21-3. The
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
at the analog input (due to pin leakage current). The
maximum recommended impedance for analog
sources is 2.5 k . After the analog input channel is
selected (changed), the channel must be sampled for
at least the minimum acquisition time before starting a
conversion.
EQUATION 21-1:
EQUATION 21-2:
EQUATION 21-3:
DS39632C-page 264
T
V
or
T
T
T
T
Temperature coefficient is only required for temperatures > 25 C. Below 25 C, T
T
T
ACQ
C
ACQ
AMP
COFF
C
ACQ
DD
Note:
HOLD
). The source impedance affects the offset voltage
=
=
A/D Acquisition Requirements
SS
=
=
=
=
=
SS
=
=
) impedance varies over the device voltage
When the conversion is started, the
holding capacitor is disconnected from the
input pin.
Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient
T
) impedance directly affect the time
AMP
T
0.2 s
(Temp – 25 C)(0.02 s/ C)
(85 C – 25 C)(0.02 s/ C)
1.2 s
-(C
-(25 pF) (1 k + 2 k + 2.5 k ) ln(0.0004883) s
1.05 s
0.2 s + 1.05 s + 1.2 s
2.45 s
(V
-(C
AMP
+ T
REF
HOLD
HOLD
+ T
C
– (V
ACQUISITION TIME
A/D MINIMUM CHARGING TIME
CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME
S
+ T
)(R
C
)(R
) and the internal sampling
+ T
COFF
REF
IC
IC
+ R
COFF
/2048)) • (1 – e
+ R
HOLD
SS
SS
HOLD
+ R
+ R
) must be allowed
S
S
) ln(1/2048) s
. The sampling
) ln(1/2048)
(-T
C
/C
HOLD
Preliminary
(R
IC
+ R
SS
+ R
S
To
Equation 21-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
Example 21-3 shows the calculation of the minimum
required acquisition time T
based
assumptions:
C
Rs
Conversion Error
V
Temperature
))
DD
HOLD
)
calculate
on
COFF
the
= 0 ms.
the
=
=
=
=
following
minimum
© 2006 Microchip Technology Inc.
25 pF
2.5 k
1/2 LSb
5V
85 C (system max.)
ACQ
R
. This calculation is
SS
application
acquisition
= 2 k
system
time,

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