ICS1893Y-10 IDT, Integrated Device Technology Inc, ICS1893Y-10 Datasheet - Page 69

• Manufacturer Part Number: ICS1893Y-10
• Description: PHYCEIVER LOW PWR 3.3V 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893Y-10

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 1893Y-10; 800-1934-5; ICS1893Y-10

7.3 Register 1: Status Register
7.3.1 100Base-T4 (bit 1.15)
ICS1893Y-10 Rev F 1/20/04
Table 7-6
and an STA. There are two types of status bits: some report the capabilities of the port, and some indicate
the state of signals used to monitor internal circuits.
The STA accesses the Status Register using the Serial Management Interface. During a reset, the
ICS1893Y-10 initializes the Status Register bits to pre-defined, default values.
Note:
Table 7-6. Status Register (Register 1 [0x01])
† As per the IEEE Std 802.3u, during any write operation to any bit in this register, the STA must write the default value
The STA reads this bit to learn if the ICS1893Y-10 can support 100Base-T4 operations. Bit 1.15 of the
ICS1893Y-10 is permanently set to logic zero, which informs an STA that the ICS1893Y-10 cannot support
100Base-T4 operations.
1.15
1.14
1.13
1.12
1.10
1.11
1.9
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
Bit
to all Reserved bits.
ICS1893Y-10 - Release
100Base-T4
100Base-TX full duplex
100Base-TX half duplex Mode not supported
10Base-T full duplex
10Base-T half duplex
IEEE reserved
IEEE reserved
IEEE reserved
IEEE reserved
MF Preamble
suppression
Auto-Negotiation
complete
Remote fault
Auto-Negotiation ability
Link status
Jabber detect
Extended capability
For an explanation of acronyms used in
lists the Status Register bits. These 16 bits of data provide an interface between the ICS1893Y-10
Definition
Copyright © 2004, Integrated Circuit Systems, Inc.
Always 0. (Not supported.) N/A
Mode not supported
Mode not supported
Mode not supported
Always 0
Always 0
Always 0
Always 0
PHY requires MF
Preambles
Auto-Negotiation is in
process, if enabled
No remote fault detected
N/A
Link is invalid/down
No jabber condition
N/A
When Bit = 0
All rights reserved.
69
Table
7-5, see
Mode supported
Mode supported
Mode supported
Mode supported
N/A
N/A
N/A
N/A
PHY does not require
MF Preambles
Auto-Negotiation is
completed
Remote fault detected
Always 1: PHY has
Auto-Negotiation ability
Link is valid/established
Jabber condition
detected
Always 1: PHY has
extended capabilities
When Bit = 1
Chapter 1, “Abbreviations and
Chapter 7 Management Register Set
cess
Ac-
CW
CW
CW
CW
CW
CW
CW
CW
RO
RO
RO
RO
RO
RO
RO
RO
SF
LH
LH
LH
LL
–
–
–
–
–
–
–
–
–
–
–
–
January, 2004
Acronyms”.
fault
De-
0†
0†
0†
0†
1
1
0
0
1
0
0
1
0
1
1
0
Hex
7
8
0
9