PIC16F716-I/SS Microchip Technology Inc., PIC16F716-I/SS Datasheet - Page 30

• Manufacturer Part Number: PIC16F716-I/SS
• Description: MCU, 8-Bit, 2KW Flash, 128 RAM, 13 I/O, SSOP-20
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F716-I/SS

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin SSOP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F716
4.1.3
A single software programmable prescaler is available
for use with either Timer0 or the Watchdog Timer
(WDT), but not both simultaneously. The prescaler
assignment is controlled by the PSA bit of the OPTION
register. To assign the prescaler to Timer0, the PSA bit
must be cleared to a ‘0’.
There are 8 prescaler options for the Timer0 module
ranging from 1:2 to 1:256. The prescale values are
selectable via the PS<2:0> bits of the OPTION register.
In order to have a 1:1 prescaler value for the Timer0
module, the prescaler must be assigned to the WDT
module.
The prescaler is not readable or writable. When
assigned to the Timer0 module, all instructions writing to
the TMR0 register will clear the prescaler.
When the prescaler is assigned to WDT, a CLRWDT
instruction will clear the prescaler along with the WDT.
4.1.3.1
As a result of having the prescaler assigned to either
Timer0 or the WDT, it is possible to generate an
unintended device Reset when switching prescaler
values. When changing the prescaler assignment from
Timer0 to the WDT module, the instruction sequence
shown in Example 4-1, must be executed.
EXAMPLE 4-1:
TABLE 4-1:
DS41206B-page 28
TMR0
INTCON
OPTION_REG
TRISA
Legend:
BANKSEL
CLRWDT
CLRF
BANKSEL
BSF
CLRWDT
MOVLW
ANDWF
IORLW
MOVWF
Name
– = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Timer0
module.
SOFTWARE PROGRAMMABLE
PRESCALER
TMR0
TMR0
OPTION_REG
OPTION_REG,PSA
b’11111000’
OPTION_REG,W
b’00000101’
OPTION_REG
Switching Prescaler Between
Timer0 and WDT Modules
Timer0 Module Register
SUMMARY OF REGISTERS ASSOCIATED WITH TIMER0
RBPU
Bit 7
GIE
—
CHANGING PRESCALER
(TIMER0 → WDT)
INTEDG
Bit 6
PEIE
—
;
;Clear WDT
;Clear TMR0 and
;prescaler
;
;Select WDT
;
;
;Mask prescaler
;bits
;Set WDT prescaler
;to 1:32
T0CS
Bit 5
T0IE
—
TRISA4
T0SE
Bit 4
INTE
TRISA3
RBIE
Bit 3
PSA
When changing the prescaler assignment from the
WDT to the Timer0 module, the following instruction
sequence must be executed (see Example 4-2).
EXAMPLE 4-2:
4.1.4
Timer0 will generate an interrupt when the TMR0
register overflows from FFh to 00h. The T0IF interrupt
flag bit of the INTCON register is set every time the
TMR0 register overflows, regardless of whether or not
the Timer0 interrupt is enabled. The T0IF bit must be
cleared in software. The Timer0 interrupt enable is the
T0IE bit of the INTCON register.
4.1.5
When Timer0 is in Counter mode, the synchronization
of the T0CKI input and the Timer0 register is accom-
plished by sampling the prescaler output on the Q2 and
Q4 cycles of the internal phase clocks. Therefore, the
high and low periods of the external clock source must
meet the timing requirements as shown in the
Section 12.0 “Electrical Characteristics”.
TRISA2
CLRWDT
BANKSEL OPTION_REG
MOVLW
ANDWF
IORLW
MOVWF
Bit 2
Note:
T0IF
PS2
TRISA1
INTF
Bit 1
b’11110000’
OPTION_REG,W ;prescaler bits
b’00000011’
OPTION_REG
PS1
TIMER0 INTERRUPT
The Timer0 interrupt cannot wake the
processor from Sleep since the timer is
frozen during Sleep.
USING TIMER0 WITH AN
EXTERNAL CLOCK
TRISA0
RBIF
Bit 0
PS0
CHANGING PRESCALER
(WDT → TIMER0)
© 2007 Microchip Technology Inc.
;Clear WDT and
;prescaler
;
;Mask TMR0 select and
;Set prescale to 1:16
;
xxxx xxxx
0000 000x
1111 1111
---1 1111
POR, BOR
Value on
uuuu uuuu
0000 000u
1111 1111
---1 1111
Value on
all other
Resets