PIC16F716-I/SS Microchip Technology Inc., PIC16F716-I/SS Datasheet - Page 33

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PIC16F716-I/SS

Manufacturer Part Number
PIC16F716-I/SS
Description
MCU, 8-Bit, 2KW Flash, 128 RAM, 13 I/O, SSOP-20
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F716-I/SS

A/d Inputs
4-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
13
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin SSOP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F716-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
5.8
The ECCP module uses the TMR1H:TMR1L register
pair as the time base when operating in Capture or
Compare mode.
In Capture mode, the value in the TMR1H:TMR1L
register pair is copied into the CCPR1H:CCPR1L
register pair on a configured event.
In Compare mode, an event is triggered when the value
CCPR1H:CCPR1L register pair matches the value in
the TMR1H:TMR1L register pair. This event can be a
Special Event Trigger.
For more information, see Section 8.0 “Enhanced
Capture/Compare/PWM Module”.
FIGURE 5-2:
© 2007 Microchip Technology Inc.
T1CKI = 1
when TMR1
Enabled
T1CKI = 0
when TMR1
Enabled
Note 1: Arrows indicate counter increments.
ECCP Capture/Compare Time
Base
2: In Counter mode, a falling edge must be registered by the counter prior to the first incrementing rising edge of
the clock.
TIMER1 INCREMENTING EDGE
5.9
If a ECCP is configured to trigger a special event, the
trigger will clear the TMR1H:TMR1L register pair. This
special event does not cause a Timer1 interrupt. The
ECCP module may still be configured to generate a
ECCP interrupt.
In this mode of operation, the CCPR1H:CCPR1L regis-
ter pair effectively becomes the period register for
Timer1.
Timer1 should be synchronized to the F
the Special Event Trigger. Asynchronous operation of
Timer1 can cause a Special Event Trigger to be
missed.
In the event that a write to TMR1H or TMR1L coincides
with a Special Event Trigger from the ECCP, the write
will take precedence.
For more information, see Section 8.0 “Enhanced
Capture/Compare/PWM Module”.
ECCP Special Event Trigger
PIC16F716
DS41206B-page 31
OSC
to utilize

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