PIC16F716-I/SS Microchip Technology Inc., PIC16F716-I/SS Datasheet - Page 76

• Manufacturer Part Number: PIC16F716-I/SS
• Description: MCU, 8-Bit, 2KW Flash, 128 RAM, 13 I/O, SSOP-20
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F716-I/SS

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin SSOP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F716
9.12
The Watchdog Timer is a free running, on-chip, RC
oscillator which does not require any external
components. This RC oscillator is separate from the RC
oscillator of the OSC1/CLKIN pin. That means that the
WDT will run, even if the clock on the OSC1/CLKIN and
OSC2/CLKOUT pins of the device have been stopped,
for example, by execution of a SLEEP instruction.
During normal operation, a WDT time-out generates a
device Reset (Watchdog Timer Reset). If the device is in
Sleep mode, a WDT time-out causes the device to
wake-up and continue with normal operation (Watchdog
Timer Wake-up). The TO bit in the STATUS register will
be cleared upon a Watchdog Timer time-out.
The WDT can be permanently disabled by clearing
Configuration bit WDTE (Section 9.1 “Configuration
Bits”).
FIGURE 9-14:
TABLE 9-7:
DS41206B-page 74
CONFIG1
OPTION_REG
Legend:
Note
Note:
Name
1:
(1)
Watchdog Timer (WDT)
x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used the Watchdog Timer.
See Configuration Word Register (Register 9-1) for operation of all register bits.
PSA and PS2:PS0 are bits in the OPTION register.
BORV
RBPU
Bit 7
SUMMARY OF REGISTERS ASSOCIATED WITH WATCHDOG TIMER
WATCHDOG TIMER BLOCK DIAGRAM
WDT Timer
INTEDG
Enable Bit
BOREN
Bit 6
WDT
From TMR0 Clock Source (Figure 4-1)
T0CS
Bit 5
—
T0SE
Bit 4
—
0
1
PSA
M
U
X
PWRTE
Bit 3
PSA
Electrical Specifications section under T
WDT time-out period values may be found in the
#31). Values for the WDT prescaler (actually a
postscaler, but shared with the Timer0 prescaler) may be
assigned using the OPTION register.
.
WDTE
Bit 2
PS2
0
Note:
Note:
Time-out
8-to-1 MUX
MUX
WDT
Postscaler
FOSC1
Bit 1
PS1
1
The CLRWDT and SLEEP instructions clear
the WDT and the postscaler, if assigned to
the WDT, and prevent it from timing out
and generating a device Reset condition.
When a CLRWDT instruction is executed
and the prescaler is assigned to the WDT,
the prescaler count will be cleared, but the
prescaler assignment is not changed.
8
FOSC0
PSA
To TMR0 (Figure 4-1)
Bit 0
PS0
© 2007 Microchip Technology Inc.
PS2:PS0
1111 1111
POR, BOR
Value on
—
WDT
1111 1111
(parameter
Value on
all other
Resets
—