PEF82912FV14XP Lantiq, PEF82912FV14XP Datasheet - Page 100

• Manufacturer Part Number: PEF82912FV14XP
• Manufacturer: Lantiq

Specifications of PEF82912FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Figure 46
•
Figure 46
Combinations of transition criteria are possible. Logical “AND” is indicated by “&” (TN &
DC), logical “OR” is written “or” and for a negation “/” is used. The start of a timer is
indicated with “TxS” (“x” being equivalent to the timer number). Timers are always
started when entering the new state. The action resulting after a timer has expired is
indicated by the path labelled “TxE”.
Data Sheet
shows how to interpret the state diagrams.
Explanation of State Diagram Notation
Signal Transmitted
to U-Interface
(general)
Indication Transmitted on C/I-Channel
State Name
(DOUT)
OUT
IN
86
to U-Interface
Transmitted
Single Bit
ITD04257.vsd
Functional Description
PEF 82912/82913
2001-03-30