PEF82912FV14XP Lantiq, PEF82912FV14XP Datasheet - Page 80

• Manufacturer Part Number: PEF82912FV14XP
• Manufacturer: Lantiq

Specifications of PEF82912FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

•
Figure 36
The read access timing is illustrated in
name is associated with each read register (EOCR, M4R, M56R). An EOC interrupt
indicates that the value of the EOCR register has been changed and updated. So do the
M4 and M56 interrupts. Note that unlike the 6 ms and 12 ms interrupts the ’read’
interrupts are only generated on change of the register value and do not occur
periodically.
The EOC, M4 and M56 interrupt bits are all accommodated in the ISTAU register.
Data Sheet
12ms Interrupt
6ms Interrupt
Frame No.
Frame No.
Write Access Timing
#1
#1
max. 3 Base Frames
µC write access
time to EOCW
(4.5ms)
ISTAU clears 6ms
read access to
1. EOC
interrupt
µC write access time to M4W, M56W
ISTAU clears 12ms
read access to
interrupt
max. 7 Base Frames
#4
66
Figure
(10.5ms)
#5
37. An interrupt source of the same
µC write access
3 Base Frames
time to EOCW
(4.5ms)
2. EOC
Functional Description
PEF 82912/82913
#8
#8
wr_acs_timg_QSMINT.emf
#1
#1
2001-03-30