PEF82912FV14XP Lantiq, PEF82912FV14XP Datasheet - Page 117

• Manufacturer Part Number: PEF82912FV14XP
• Manufacturer: Lantiq

Specifications of PEF82912FV14XP

• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

2.5
The S-Transceiver offers the NT and LT-S mode state machines described in the User’s
Manual V3.4 [10].
The S-transceiver lies in IOM -2 channel 1 (default) and is configured and controlled
via the registers described in
but can be set to LT-S mode via register programming.
The TE mode (S-transceiver TE mode, U-transceiver disabled) is not supported.
2.5.1
Line Coding
The following figure illustrates the line code. A binary ONE is represented by no line
signal. Binary ZEROs are coded with alternating positive and negative pulses with two
exceptions:
For the required frame structure a code violation is indicated by two consecutive pulses
of the same polarity. These two pulses can be adjacent or separated by binary ONEs.
In bus configurations a binary ZERO always overwrites a binary ONE.
•
Figure 51
Frame Structure
Each S/T frame consists of 48 bits at a nominal bit rate of 192 kbit/s. For user data
(B1+B2+D) the frame structure applies to a data rate of 144 kbit/s (see
In the direction TE
framing rules please refer to ITU I.430 section 6.3. The following figure illustrates the
standard frame structure for both directions (NT
and maintenance bits.
Data Sheet
S-Transceiver
Line Coding, Frame Structure
S/T -Interface Line Code
NT the frame is transmitted with a two bit offset. For details on the
Chapter
4.7. The state machine is set to NT mode (default)
103
TE and TE
Functional Description
PEF 82912/82913
NT) with all framing
0 1 1
Figure
code violation
2001-03-30
51).