PIC24F08KA102-E/ML Microchip Technology Inc., PIC24F08KA102-E/ML Datasheet - Page 107

• Manufacturer Part Number: PIC24F08KA102-E/ML
• Description: 8KB FLASH, 1.5KB RAM, 512B EEPROM, 16 MIPS, 24 I/O, 16-BIT PIC24F FAMILY, NANOWAT
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24F08KA102-E/ML

• A/d Inputs: 9 Channel, 10-bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 28-pin QFN
• Programmable Memory: 8K Bytes
• Ram Size: 1.5K Bytes
• Speed: 32 MHz
• Temperature Range: –40 to 125 °C
• Timers: 3-16-bit
• Voltage, Range: 1.8-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part

REGISTER 10-1:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-2
bit 1
bit 0
Note 1:
R/W-0
DSEN
U-0
—
2:
All register bits are reset only in the case of a POR event outside of Deep Sleep mode.
Unlike all other events, a Deep Sleep BOR event will NOT cause a wake-up from Deep Sleep; this
re-arms POR.
DSEN: Deep Sleep Enable bit
1 = Enters Deep Sleep on execution of PWRSAV #0
0 = Enters normal Sleep on execution of PWRSAV #0
Unimplemented: Read as ‘0’
DSBOR: Deep Sleep BOR Event bit
1 = The DSBOR was active and a BOR event was detected during Deep Sleep
0 = The DSBOR was not active, or was active but did not detect a BOR event during Deep Sleep
RELEASE: I/O Pin State Release bit
1 = Upon waking from Deep Sleep, I/O pins maintain their states previous to Deep Sleep entry
0 = Release I/O pins from their state previous to Deep Sleep entry, and allow their respective TRIS and
LAT bits to control their states
U-0
U-0
—
—
DSCON: DEEP SLEEP CONTROL REGISTER
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
U-0
U-0
(2)
Preliminary
—
—
PIC24F16KA102 FAMILY
HS = Hardware Settable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
(1)
U-0
U-0
—
—
x = Bit is unknown
DSBOR
R/W-0
U-0
—
(2)
DS39927B-page 105
RELEASE
R/C-0, HS
U-0
—
bit 8
bit 0