PIC24F08KA102-E/ML Microchip Technology Inc., PIC24F08KA102-E/ML Datasheet - Page 250

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PIC24F08KA102-E/ML

Manufacturer Part Number
PIC24F08KA102-E/ML
Description
8KB FLASH, 1.5KB RAM, 512B EEPROM, 16 MIPS, 24 I/O, 16-BIT PIC24F FAMILY, NANOWAT
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24F08KA102-E/ML

A/d Inputs
9 Channel, 10-bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
24
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin QFN
Programmable Memory
8K Bytes
Ram Size
1.5K Bytes
Speed
32 MHz
Temperature Range
–40 to 125 °C
Timers
3-16-bit
Voltage, Range
1.8-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part
PIC24F16KA102 FAMILY
Resets
Revision History ............................................................... 243
RTCC ............................................................................... 151
S
Selective Peripheral Power Control ................................. 107
Serial Peripheral Interface. See SPI.
SFR Space ......................................................................... 28
Software Simulator (MPLAB SIM) .................................... 200
Software Stack ................................................................... 37
DS39927B-page 248
T2CON (Timer2 Control) .......................................... 116
T3CON (Timer3 Control) .......................................... 117
UxMODE (UARTx Mode) ......................................... 146
UxRXREG (UARTx Receive) ................................... 150
UxSTA (UARTx Status and Control) ........................ 148
UxTXREG (UARTx Transmit) .................................. 150
WKDYHR (RTCC Weekday and
YEAR (RTCC Year Value) ....................................... 156
Clock Source Selection .............................................. 59
Delay Times ............................................................... 60
Device Times ............................................................. 60
RCON Flags Operation .............................................. 59
SFR States ................................................................. 61
Alarm Configuration ................................................. 160
Alarm Mask Settings (figure) .................................... 161
Calibration ................................................................ 160
Register Mapping ..................................................... 152
Selecting Clock Source ............................................ 152
Source Clock ............................................................ 151
Write Lock ................................................................ 152
Hours Value) .................................................... 157
Preliminary
T
Timer1 .............................................................................. 111
Timer2/3 ........................................................................... 113
Timing Diagrams
Timing Requirements
U
UART ............................................................................... 143
Unused I/Os ....................................................................... 18
V
Voltage Regulator Pins ...................................................... 17
W
Watchdog Timer
Watchdog Timer (WDT) ................................................... 196
WWW Address ................................................................ 249
WWW, On-Line Support ...................................................... 6
CLKO and I/O Timing .............................................. 226
External Clock .......................................................... 224
CLKO and I/O .......................................................... 226
External Clock .......................................................... 224
PLL Clock Specifications ......................................... 225
Baud Rate Generator (BRG) ................................... 144
Break and Sync Transmit Sequence ....................... 145
IrDA Support ............................................................ 145
Operation of UxCTS and UxRTS Control Pins ........ 145
Receiving in 8-Bit or 9-Bit Data Mode ...................... 145
Transmitting in 8-Bit Data Mode .............................. 145
Transmitting in 9-Bit Data Mode .............................. 145
Deep Sleep (DSWDT) ............................................. 197
Windowed Operation ............................................... 196
© 2009 Microchip Technology Inc.

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