PIC24F08KA102-E/ML Microchip Technology Inc., PIC24F08KA102-E/ML Datasheet - Page 177

• Manufacturer Part Number: PIC24F08KA102-E/ML
• Description: 8KB FLASH, 1.5KB RAM, 512B EEPROM, 16 MIPS, 24 I/O, 16-BIT PIC24F FAMILY, NANOWAT
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24F08KA102-E/ML

• A/d Inputs: 9 Channel, 10-bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 28-pin QFN
• Programmable Memory: 8K Bytes
• Ram Size: 1.5K Bytes
• Speed: 32 MHz
• Temperature Range: –40 to 125 °C
• Timers: 3-16-bit
• Voltage, Range: 1.8-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part

REGISTER 22-5:
REGISTER 22-6:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-10
bit 9-6
bit 5-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-10
bit 9-6
bit 5-0
U-0
U-0
U-0
U-0
—
—
—
—
Unimplemented: Read as ‘0’
PCFG<12:10>: Analog Input Pin Configuration Control bits
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read enabled
0 = Pin configured in Analog mode; I/O port read disabled; A/D samples pin voltage
Unimplemented: Read as ‘0’
PCFG<5:0>: Analog Input Pin Configuration Control bits
1 = Pin for corresponding analog channel is configured in Digital mode; I/O port read enabled
0 = Pin configured in Analog mode; I/O port read disabled; A/D samples pin voltage
Unimplemented: Read as ‘0’
CSSL<12:10>: A/D Input Pin Scan Selection bits
1 = Corresponding analog channel selected for input scan
0 = Analog channel omitted from input scan
Unimplemented: Read as ‘0’
CSSL<5:0>: A/D Input Pin Scan Selection bits
1 = Corresponding analog channel selected for input scan
0 = Analog channel omitted from input scan
U-0
U-0
U-0
U-0
—
—
—
—
AD1PCFG: A/D PORT CONFIGURATION REGISTER
AD1CSSL: A/D INPUT SCAN SELECT REGISTER (LOW)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PCFG5
CSSL5
R/W-0
R/W-0
U-0
U-0
—
—
CSSL12
PCFG12
CSSL4
R/W-0
R/W-0
PCFG4
R/W-0
R/W-0
Preliminary
PIC24F16KA102 FAMILY
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CSSL11
CSSL3
R/W-0
R/W-0
PCFG11
PCFG3
R/W-0
R/W-0
CSSL10
CSSL2
R/W-0
R/W-0
PCFG10
PCFG2
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
CSSL1
R/W-0
PCFG1
U-0
R/W-0
—
U-0
—
DS39927B-page 175
CSSL0
R/W-0
PCFG0
R/W-0
U-0
—
U-0
—
bit 8
bit 0
bit 8
bit 0