PIC24F08KA102-E/ML Microchip Technology Inc., PIC24F08KA102-E/ML Datasheet - Page 64

• Manufacturer Part Number: PIC24F08KA102-E/ML
• Description: 8KB FLASH, 1.5KB RAM, 512B EEPROM, 16 MIPS, 24 I/O, 16-BIT PIC24F FAMILY, NANOWAT
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24F08KA102-E/ML

• A/d Inputs: 9 Channel, 10-bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 28-pin QFN
• Programmable Memory: 8K Bytes
• Ram Size: 1.5K Bytes
• Speed: 32 MHz
• Temperature Range: –40 to 125 °C
• Timers: 3-16-bit
• Voltage, Range: 1.8-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC24F16KA102 FAMILY
7.5.2
When BOR is enabled, the BOR bit (RCON<1>) is
always reset to ‘1’ on any BOR or POR event. This
makes it difficult to determine if a BOR event has
occurred just by reading the state of BOR alone. A
more reliable method is to simultaneously check the
state of both POR and BOR. This assumes that the
POR and BOR bits are reset to ‘0’ in the software
immediately after any POR event. If the BOR bit is ‘1’
while POR is ‘0’, it can be reliably assumed that a BOR
event has occurred.
DS39927B-page 62
Note:
DETECTING BOR
Even when the device exits from Deep
Sleep mode, both the POR and BOR are
set.
Preliminary
7.5.3
When BOREN<1:0> = 10, BOR remains under hard-
ware control and operates as previously described.
However, whenever the device enters Sleep mode,
BOR is automatically disabled. When the device
returns to any other operating mode, BOR is
automatically re-enabled.
This mode allows for applications to recover from
brown-out situations, while actively executing code,
when the device requires BOR protection the most. At
the same time, it saves additional power in Sleep mode
by eliminating the small incremental BOR current.
DISABLING BOR IN SLEEP MODE
© 2009 Microchip Technology Inc.