ST92T141K4M6 STMicroelectronics, ST92T141K4M6 Datasheet - Page 46

• Manufacturer Part Number: ST92T141K4M6
• Description: Microcontrollers (MCU) OTP EPROM 16K SPI
• Manufacturer: STMicroelectronics

Specifications of ST92T141K4M6

• Data Bus Width: 8 bit, 16 bit
• Program Memory Type: EPROM
• Program Memory Size: 16 KB
• Data Ram Size: 512 B
• Interface Type: SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-34
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / Rohs Status: No

ST92141 - INTERRUPTS
3.6 EXTERNAL INTERRUPTS
The standard ST9 core contains 8 external inter-
rupts sources grouped into four pairs.
Table 12. External Interrupt Channel Grouping
Each source has a trigger control bit TEA0,..TED1
(R242,EITR.0,..,7 Page 0) to select triggering on
the rising or falling edge of the external pin. If the
Trigger control bit is set to “1”, the corresponding
pending bit IPA0,..,IPD1 (R243,EIPR.0,..,7 Page
0) is set on the input pin rising edge, if it is cleared,
the pending bit is set on the falling edge of the in-
put pin. Each source can be individually masked
through
IMA0,..,IMD1 (EIMR.7,..,0). See
The priority level of the external interrupt sources
can be programmed among the eight priority lev-
els with the control register EIPLR (R245). The pri-
ority level of each pair is software defined using
the bits PRL2, PRL1. For each pair, the even
channel (A0,B0,C0,D0) of the group has the even
priority level and the odd channel (A1,B1,C1,D1)
has the odd (lower) priority level.
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1
External Interrupt
none
INT6
none
none
none
none
none
INT0
the
corresponding
Figure
Channel
INTD1
INTD0
INTC1
INTC0
INTB1
INTB0
INTA1
INTA0
control
22.
bit
Figure 21. Priority Level Examples
n
Figure 21
Figure 22
rupt control bits and vectors.
– The source of the interrupt channel A0 can be
– The source of the interrupt channel D0 can be
WARNING: When using channels shared by both
external interrupts and peripherals, special care
must be taken to configure their control registers
for both peripherals and interrupts.
Table 13. Multiplexed Interrupt Sources
INT.D0:
INT.D1:
INT.C1: 001=1
SOURCE
INT.C0: 000=0
Channel
selected between the external pin INT0 (when
IA0S = “1”, the reset value) or the On-chip Timer/
Watchdog peripheral (when IA0S = “0”).
selected between the external pin INT6 (when
INT_SEL = “0”) or the on-chip RCCU.
INTA0
INTD0
101=5
100=4
PRIORITY
shows an example of priority levels.
gives an overview of the External inter-
PL2D PL1D PL2C PL1C PL2B PL1B PL2A PL1A
Internal Interrupt
1
Timer/Watchdog
0
Source
RCCU
0
0
1
0
0
External Interrupt
1
SOURCE
Source
INT.A0: 010=2
INT.A1: 011=3
INT.B0: 100=4
INT.B1: 101=5
INT0
INT6
EIPLR
VR000151
PRIORITY