IC I/O EXPANDER CAN 8B 14DIP

MCP25055-I/P

Manufacturer Part NumberMCP25055-I/P
DescriptionIC I/O EXPANDER CAN 8B 14DIP
ManufacturerMicrochip Technology
MCP25055-I/P datasheets
 


Specifications of MCP25055-I/P

Mounting TypeThrough HoleInterface1-Wire, CAN
Number Of I /o8Interrupt OutputNo
Frequency - Clock4MHzVoltage - Supply2.7 V ~ 5.5 V
Operating Temperature-40°C ~ 85°CPackage / Case14-DIP (0.300", 7.62mm)
IncludesADC, Memory, PWMBus Frequency4MHz
No. Of I/o's8Supply Voltage Range2.7V To 5.5V
Digital Ic Case StyleDIPNo. Of Pins14
Operating Temperature Range-40°C To +85°CData Rate Max1Mbps
Leaded Process CompatibleYesRohs CompliantYes
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use WithDV250501 - KIT DEV CAN MCP250XX
Other namesMCP25055I/P  
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CAN I/O Expander Family
Features
• Implements CAN V2.0B
- Programmable bit rate up to 1 Mb/s
- One programmable mask
- Two programmable filters
- Three auto-transmit buffers
- Two message reception buffers
- Does not require synchronization or
configuration messages
• Hardware Features
- Non-volatile memory for user configuration
- User configuration automatically loaded on
power-up
- Eight general-purpose I/O lines individually
selectable as inputs or outputs
- Individually selectable transmit-on-pin-
change for each input
- Four 10-bit, analog input channels with
programmable conversion clock and V
sources (MCP2505X devices only)
- Message scheduling capability
- Two 10-bit PWM outputs with independently
programmable frequencies
- Device configuration can be modified via
CAN bus messages
- In-Circuit Serial Programming™ (ICSP™) of
default configuration memory
- Optional 1-wire CAN bus operation
• Low-power CMOS technology
- Operates from 2.7V to 5.5V
- 10 mA active current, typical
- 30 µA standby current (CAN Sleep mode)
• 14-pin PDIP (300 mil) and SOIC (150 mil)
packages
• Available temperature ranges:
- Industrial (I): -40°C to +85°C
- Extended (E): -40°C to +125°C
© 2007 Microchip Technology Inc.
MCP2502X/5X
Description
The MCP2502X/5X devices operate as I/O expanders
for a Controller Area Network (CAN) system,
supporting CAN V2.0B active, with bus rates up to
1 Mb/s. The MCP2502X/5X allows a simple CAN node
to
be
implemented
microcontroller.
The
devices
are
exceptions:
Device
MCP25020
MCP25025
MCP25050
MCP25055
The MCP2502X/5X devices feature a number of
peripherals, including digital I/Os, four-channel 10-bit
REF
A/D (MCP2505X) and PWM outputs with automatic
message transmission on change-of-input state. This
includes an analog input exceeding a preset threshold.
One mask and two acceptance filters are provided to
give maximum flexibility during system design with
respect to identifiers that the device will respond to.
The device can also be configured to automatically
transmit a unique message whenever any of several
error conditions occur.
The device is pre-programmed in non-volatile memory
so that the part defaults to a specific configuration at
power-up.
without
the
need
for
a
identical,
with
the
following
One Wire
A/D
Digital
CANbus
No
No
No
Yes
Yes
No
Yes
Yes
DS21664D-page 1

MCP25055-I/P Summary of contents

  • Page 1

    ... Device MCP25020 MCP25025 MCP25050 MCP25055 The MCP2502X/5X devices feature a number of peripherals, including digital I/Os, four-channel 10-bit REF A/D (MCP2505X) and PWM outputs with automatic message transmission on change-of-input state. This includes an analog input exceeding a preset threshold. One mask and two acceptance filters are provided to give maximum flexibility during system design with respect to identifiers that the device will respond to ...

  • Page 2

    ... Edge Detection - refers to the MCP2502X/5X’s ability to automatically transmit a message based upon the occurance of a predefined edge on any digital input. DS21664D-page 2 Threshold Detection - refers to the MCP2502X/5X’s ability to automatically transmit a message when a predefined analog threshold is reached. PP © 2007 Microchip Technology Inc. ...

  • Page 3

    ... CAN data transmit output V 14 Power DD * Only the MCP2505X devices have the A/D module. © 2007 Microchip Technology Inc. MCP2502X/5X Figure 1-1 is the block diagram of the MCP2502X/5X and Table 1-1 is the pinout description. The following sections detail the modules as listed in Figure 1-1. ...

  • Page 4

    ... MCP2502X/5X NOTES: DS21664D-page 4 © 2007 Microchip Technology Inc. ...

  • Page 5

    ... PROTOCOL ENGINE Shift<14:0> {Transmit<5:0>, Receive<8:0>} Transmit Logic TXCAN/TXRXCAN © 2007 Microchip Technology Inc. • One full-acceptance mask (standard and extended) • Two full-acceptance filters (standard and extended) • One filter for each receive buffer • Three prioritized transmit buffers for transmitting predefined message types • ...

  • Page 6

    ... MCP2502X/5X can be determined by reading the EFLG register via the Read CAN error message. RESET Error-Active 128 occurrences of 11 consecutive “recessive” bits REC > 127 or TEC > 127 TEC > 255 Bus-Off back to error-active for bus-off) of the © 2007 Microchip Technology Inc. ...

  • Page 7

    ... The BTL also provides programmable time segments to compensate for the propagation delay time, phase shifts and to define the position of the sample point within the bit time. These programmable segments are made up of integer units called Time Quanta (T © 2007 Microchip Technology Inc. R-0 R-0 R-0 R-0 ...

  • Page 8

    ... Q Q the programmed Synchronization Jump Width (SJW). This adjustment is made for resynchronization during a message and not hard synchronization, which occurs only at the message Start-of-Frame (SOF). Phase Buffer Segments - duration duration. However, due may also be defined long. Q © 2007 Microchip Technology Inc. ...

  • Page 9

    ... 1/F Q Legend Readable bit - n = Value at POR © 2007 Microchip Technology Inc. 2.4.6.2 The PRSEG<2:0> bits set the length (in T propagation segment. The PS1<2:0> bits set the length (in T ’s) of phase segment 1. The SAM bit controls how Q . The value of Q many times the RXCAN pin is sampled. Setting this bit to a ‘ ...

  • Page 10

    ... W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-0 R/W-0 R/W-0 PRSEG2 PRSEG1 PRSEG0 bit Bit is unknown R/W-0 R/W-0 R/W-0 PHSEG22 PHSEG21 PHSEG20 bit Bit is unknown © 2007 Microchip Technology Inc. ...

  • Page 11

    ... Microchip Technology Inc. Command Acknowledge: TXID1 sends a Command Acknowledge message when the MCP2502X/5X receives an Input Message and processes the instruction (and OPTREG2.CAEN = 1). This message is used as a hand shake for the node requesting the modification of the MCP2502X/5X ...

  • Page 12

    ... R/W-x R/W-x R/W-x SID8 SID7 SID6 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared of the standard identifier R/W-x R/W-x R/W-x SID5 SID4 SID3 bit Bit is unknown © 2007 Microchip Technology Inc. ...

  • Page 13

    ... TXIDNEID0 - TRANSMIT IDENTIFIER N EXTENDED IDENTIFIER LOW R/W-x R/W-x EID7 bit 7 bit 7-0 EID7:EID0: Extended Identifier bits Legend Readable bit - n = Value at POR © 2007 Microchip Technology Inc. R/W-x U-0 R/W-x SID1 SID0 — EXIDE W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘ ...

  • Page 14

    ... U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-x R/W-x SID4 SID3* bit Bit is unknown U-0 R/W-x R/W-x — EID17 EID16 bit Bit is unknown R/W-x R/W-x EID9 EID8 bit Bit is unknown © 2007 Microchip Technology Inc. ...

  • Page 15

    ... Filter will apply to extended identifier 0 = Filter will apply to standard identifier bit 2 Unimplemented: Read as ‘0’ bit 1-0 EID17:EID16: Extended Identifier bits Legend Readable bit - n = Value at POR © 2007 Microchip Technology Inc. R/W-x R/W-x R/W-x EID6 EID5 EID4 EID3 W = Writable bit U = Unimplemented bit, read as ‘0’ ...

  • Page 16

    ... R/W-x R/W-x R/W-x EID5 EID4 EID3 EID2 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-x R/W-x EID9 EID8 bit Bit is unknown R/W-x R/W-x EID1 EID0 bit Bit is unknown © 2007 Microchip Technology Inc. ...

  • Page 17

    ... EWARN; Either the Receive Error counter or Transmit error counter has reached or exceeded 96 errors 1 = TEC or REC is equal to or greater than 96 (TXWAR or RXWAR = Both REC and TEC are less than 96 Legend Readable bit - n = Value at POR © 2007 Microchip Technology Inc. R-0 R-0 R-0 R-0 RBO TXBO ...

  • Page 18

    ... MCP2502X/5X NOTES: DS21664D-page 18 © 2007 Microchip Technology Inc. ...

  • Page 19

    ... Cannot be modified from initial programmed values. 4: Unimplemented on MCP2502X devices and read 0x00 (exception, ADCON1 = 0x0F). © 2007 Microchip Technology Inc. MCP2502X/5X Note 1: When transferred to RAM, the register addresses are offset by 1Ch. Accessing individual registers using the “Write Register” or “Read Register command requires use of the offset address ...

  • Page 20

    ... AN3.3 AN3.2 xxxx xxxx uuuu uuuu — — xx-- ---- uu-- ---- AN2.3 AN2.2 xxxx xxxx uuuu uuuu — — xx-- ---- uu-- ---- AN1.3 AN1.2 xxxx xxxx uuuu uuuu — — xx-- ---- uu-- ---- AN0.3 AN0.2 xxxx xxxx uuuu uuuu — — xx-- ---- uu-- ---- © 2007 Microchip Technology Inc. ...

  • Page 21

    ... Once the MCP2502X/5X enters Normal mode ready to send/receive messages via the CAN interface. At this point the ADC and PWM peripherals are operational, if enabled. © 2007 Microchip Technology Inc. MCP2502X/5X Scheduled Transmissions Once the MCP2502X/5X has gone on bus it will transmit the On Bus message once, regardless of whether enabled or not. This message notifies the network of the MCP2502X/5X’ ...

  • Page 22

    ... Read Register message can use either standard or extended identifiers. The Read Register message has one additional requirement; it must be an extended identifier. This is discussed in more detail in Table 4-1 and Table 4-3 for more information. © 2007 Microchip Technology Inc. are selected three LSb’s ...

  • Page 23

    ... CAN 2.0B specification) that have identifiers which pass the MCP2502X/5X’s mask/filter process (using RXF1). After passing the mask and filter, the lower- © 2007 Microchip Technology Inc. MCP2502X/5X three bits (RXF1SIDL.SID2:SID0) will indicate which register(s) are to be written ...

  • Page 24

    ... TXID0 (On Bus message) has the lowest priority. In the event two or more messages are pending transmission, transmit-message-prioritization will occur and the highest message type will be sent first. Messages that are currently transmitting will not be prioritized. DS21664D-page 24 © 2007 Microchip Technology Inc. ...

  • Page 25

    TABLE 4-2: COMMAND MESSAGES (STANDARD IDENTIFIER) Standard Read A/D Regs ...

  • Page 26

    TABLE 4-3: COMMAND MESSAGES (EXTENDED IDENTIFIER) Standard DLC Read A/D Regs ...

  • Page 27

    ... The opposite conditions must occur if the compare polarity is set for A/D result < compare register. © 2007 Microchip Technology Inc. MCP2502X/5X A hysteresis example: • The user sets the upper-eight bits of the 10-bit compare register (ADCMP0H) ...

  • Page 28

    ... R/W-1 STBF1 STBF0 STM3 ) OSC ) OSC ) OSC OSC W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared = STBF1:STBF0(STM3:STM0) actual scheduled transmission R/W-1 R/W-1 R/W-1 STM2 STM1 STM0 bit Bit is unknown © 2007 Microchip Technology Inc. ...

  • Page 29

    ... TXB2SIDH SID10 SID9 28h TXB2SIDL SID2 SID1 29h TXB2EID8 EID15 EID14 EID13 2Ah TXB2EID0 EID7 EID6 2Bh © 2007 Microchip Technology Inc. bit5 bit4 bit3 bit2 BRP4 BRP3 BRP2 PHSEG11 PHSEG10 PRSEG2 — — — PHSEG22 STBF0 STM3 STM2 SLPEN ...

  • Page 30

    ... MCP2502X/5X NOTES: DS21664D-page 30 © 2007 Microchip Technology Inc. ...

  • Page 31

    ... I/O or Clock output GP7/nRST/V bit7 Input, external reset input PP or programming voltage input © 2007 Microchip Technology Inc. MCP2502X/5X 5.2 Digital Input Edge Detection All GPIO pins have a digital input edge detection feature that will automatically transmit a message when an edge with the proper polarity occurs on any of the digital inputs ...

  • Page 32

    ... U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-1 R/W-1 R/W-1 DDR2 DDR1 DDR0 bit Bit is unknown R/W-0 R/W-0 R/W-0 GP2 GP1 GP0 bit Bit is unknown R/W-0 R/W-0 R/W-0 GP2TXC GP1TXC GP0TXC bit Bit is unknown © 2007 Microchip Technology Inc. ...

  • Page 33

    ... Analog Inputs: A/D result does exceed the compare threshold 0 = Digital Inputs: A valid edge has not occurred on the digital input Analog Inputs: A/D result does not exceed the compare threshold Legend Readable bit - n = Value at POR © 2007 Microchip Technology Inc. R/W-0 R/W-0 R/W-0 GP5POL GP4POL ...

  • Page 34

    ... R = Readable bit - n = Value at POR DS21664D-page 34 R/W-1 R/W-1 U-0 CLKPS1 CLKPS0 — OSC W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-0 R/W-0 R/W-0 CMREQ AQT1 AQT0 bit Bit is unknown © 2007 Microchip Technology Inc. ...

  • Page 35

    ... IOINTPO GP7POL GP6POL 01h OPTREG1 GPPU CLKEN 04h Legend unknown unchanged unimplemented read as ‘0’. Shaded cells are not used by module. © 2007 Microchip Technology Inc. R/W-0 R/W-0 R/W-0 TXONEN SLPEN MTYPE W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘ ...

  • Page 36

    ... MCP2502X/5X NOTES: DS21664D-page 36 © 2007 Microchip Technology Inc. ...

  • Page 37

    ... If a valid message is not received, the PWM outputs GP2 and GP3 will automatically © 2007 Microchip Technology Inc. MCP2502X/5X reconfigure to their default conditions. This includes the PWM module itself being disabled and the GPIO being forced low, high or tri-state ...

  • Page 38

    ... Fpwm OSC = 20 MHz. TMRn prescaler OSC 78.12 kHz 156.30 kHz 208.30 kHz 0x3F 0x1F 0x17 8 7 5.5 R/W-x R/W-x R/W-x DC1B4 DC1B3 DC1B2 bit Bit is unknown R/W-x R/W-x R/W-x DC2B4 DC2B3 DC2B2 bit Bit is unknown © 2007 Microchip Technology Inc. ...

  • Page 39

    ... Prescaler Prescaler is 16 bit 3-2 Unimplemented: Read as '0' bit 1-0 DC2B1:DC2B0: Least Significant PWM2 Duty Cycle bits Legend Readable bit - n = Value at POR © 2007 Microchip Technology Inc. R/W-0 R/W-0 U-0 — T1CKPS1 T1CKPS0 — Writable bit U = Unimplemented bit, read as ‘0’ ...

  • Page 40

    ... POR RST DDR1 DDR0 -111 1111 -111 1111 DC1B1 DC1B0 0-00 --xx 0-00 --uu DC2B1 DC2B0 0-00 --xx 0-00 --uu 1111 1111 1111 1111 1111 1111 1111 1111 DC1B3 DC1B2 xxxx xxxx uuuu uuuu DC2B3 DC2B2 xxxx xxxx uuuu uuuu © 2007 Microchip Technology Inc. ...

  • Page 41

    ... GPIO pins, even when they are being used as analog inputs. The user must ensure that the bits in the GPDDR register are maintained set (input) when using them as analog inputs. © 2007 Microchip Technology Inc. MCP2502X/5X 7.3 A/D Conversion Modes There are two modes of conversion that can be individually selected for each analog channel that has been enabled ...

  • Page 42

    ... W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared H) N R-x R-x R-x AD4 AD3 AD2 bit Bit is unknown L) N U-0 U-0 U-0 — — — bit Bit is unknown © 2007 Microchip Technology Inc. ...

  • Page 43

    ... OSC bit 3 Reserved bit 2 Unimplemented: Reads as ‘0’ bit 1-0 Reserved Legend Readable bit - n = Value at POR © 2007 Microchip Technology Inc. R/W-x R/W-x R/W-x ANnCMP5 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared U-0 ...

  • Page 44

    ... A REF REF External REF SS V External REF External V + External V - REF REF W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-0 R/W-0 R/W-0 PCFG2 PCFG1 PCFG0 bit Bit is unknown © 2007 Microchip Technology Inc. ...

  • Page 45

    ... Unimplemented: Reads as ‘0’ bit 3-2 AN2R.1:AN2R.0: A/D Channel 2, bits 1:0 results bit 1-0 Unimplemented: Reads as ‘0’ Legend Readable bit - n = Value at POR © 2007 Microchip Technology Inc. R-x R-x R-x R-x ANnR7 ANnR6 ANnR5 W = Writable bit U = Unimplemented bit, read as ‘0’ ...

  • Page 46

    ... AN3CMP2 xxxx xxxx uuuu uuuu ADPOL xx-- ---- uu-- ---- AN2CMP. AN2CMP2 xxxx xxxx uuuu uuuu ADPOL xx-- ---- uu-- ---- AN1CMP. AN1CMP2 xxxx xxxx uuuu uuuu ADPOL xx-- ---- uu-- ---- AN0CMP. AN0CMP2 xxxx xxxx uuuu uuuu — xx-- ---- uu-- ---- STM1 STM0 0xxx xxxx 0uuu uuuu . © 2007 Microchip Technology Inc. ...

  • Page 47

    ... OPERATION OSC1 C1 XTAL R SLEEP F OSC2 C2 © 2007 Microchip Technology Inc. FIGURE 8-2: Clock from ext. System 8.2 Configuration Bits The configuration bits can be either programmed (read as ‘0’) or unprogrammed (read as ‘1’) to select various device configurations. These bits are mapped in program memory location 2007h. The configuration ...

  • Page 48

    ... When the device starts normal operation (exits the reset condition), device operating parameters (voltage, frequency, temperature, etc.) must be met to ensure proper operation. For additional information, refer to AN607, “Power-up Troubleshooting”, DS00607). R/W R/W R/W RSTEN FOSC1 FOSC0 bit Bit is unknown , eliminating the © 2007 Microchip Technology Inc. ...

  • Page 49

    ... SLEEP while in Listen-only mode immediately after power-up if there is no activity on the CAN bus. Subsequent CAN bus activity will wake the device up from SLEEP and the NEXT message will be confirmed © 2007 Microchip Technology Inc. Enable PWRT Enable OST as a valid message before entering Normal mode. This feature is enabled via the PUSLP bit in the OPTREG2 register ...

  • Page 50

    ... GP5 are Schmitt Trigger inputs in this mode. The signal definitions are summarized in Table 8-1 TABLE 8-1: IN-CIRCUIT SERIAL PROGRAMMING PIN FUNCTIONS Pin Programming Mode Pin Name Number Function V 7 Ground SS GP4 5 Data GP5 6 Clock GP7 Power DD DS21664D-page 50 boards with PP © 2007 Microchip Technology Inc. ...

  • Page 51

    ... MHz Fmax = (9.44 MHz/V) (V Note the minimum voltage of the MCP2505X device in the application. DDAPPMIN Characterized and not 100% tested. © 2007 Microchip Technology Inc. and RST)....................................................... -0. .......................................................................................................... ± > V ).................................................................................................... ± ∑ MCP2505X Frequency - 2 ...

  • Page 52

    ... SLEEP mode without losing RAM data 2. 4.5V to 5.5V CC Test Conditions V XT and LP OSC configuration V HS OSC configuration (Note 2) (Note 8 =-3.0 mA 4.5V I-temp T = 25° 1.0 MHz, AMB 5.0V (Note OSC V = 5.5V MHz OSC Inputs tied © 2007 Microchip Technology Inc. ...

  • Page 53

    ... CNV including acquisition time) Note 1: This parameter is periodically sampled and not 100% tested. 2: Measurements are taken with CLKOUT output configured Refer to Figure 9-1. © 2007 Microchip Technology Inc. MCP2502X/5X Industrial (I -40°C to +85°C AMB Automotive (E -40°C to +125°C V AMB ...

  • Page 54

    ... Note: All tests must be done with specified capacitive loads (see data sheet I/O pins. FIGURE 9-3: RESET, OST AND POWER-UP-TIMER V DD MCLR Internal POR 33 PWRT Time-out 32 OSC Time-out Internal RESET I/O Pins DS21664D-page 54 20 New Value 12 34 © 2007 Microchip Technology Inc. ...

  • Page 55

    ... Recommended impedance AIN of analog voltage source I V input current REF REF N Analog Transmit-on-change HYS Hysteresis Note: Design guidance only © 2007 Microchip Technology Inc. MCP2502X/5X Industrial (I -40°C to +85°C AMB Automotive (E -40°C to +125°C V AMB Min Max Units — 10-bits ...

  • Page 56

    ... MCP2502X/5X NOTES: DS21664D-page 56 © 2007 Microchip Technology Inc. ...

  • Page 57

    ... In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2007 Microchip Technology Inc. MCP2502X/5X Example: e MCP25050 3 XXXXXXXXXXXXXX 0725NNN Example: MCP25055 e 3 XXXXXXXXXXX 0737NNN DS21664D-page 57 ...

  • Page 58

    ... D .735 L .115 c .008 b1 .045 b .014 eB – INCHES NOM MAX 14 – .210 .130 .195 – – .310 .325 .250 .280 .750 .775 .130 .150 .010 .015 .060 .070 .018 .022 – .430 Microchip Technology Drawing C04-005B © 2007 Microchip Technology Inc. ...

  • Page 59

    ... Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. © 2007 Microchip Technology Inc ...

  • Page 60

    ... MCP2502X/5X NOTES: DS21664D-page 60 © 2007 Microchip Technology Inc. ...

  • Page 61

    ... MCP25025: CAN I/O Expander MCP25025T: CAN I/O Expander (Tape and Reel) MCP25050: Mixed Signal CAN I/O Expander MCP25050T: Mixed Signal CAN I/O Expander (Tape and Reel) MCP25055: Mixed Signal CAN I/O Expander MCP25055T: Mixed Signal CAN I/O Expander (Tape and Reel) Temperature Range -40° ...

  • Page 62

    ... MCP2502X/5X NOTES: DS21664D-page 62 © 2007 Microchip Technology Inc. ...

  • Page 63

    ... APPENDIX A: REVISION HISTORY Revision D (January 2007) This revision includes updates to the packaging diagrams. © 2007 Microchip Technology Inc. MCP2502X/5X DS21664D-page 63 ...

  • Page 64

    ... NOTES: DS21664D-page 64 © 2007 Microchip Technology Inc. ...

  • Page 65

    ... Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

  • Page 66

    ... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...