PCA9543AD,118 NXP Semiconductors, PCA9543AD,118 Datasheet - Page 6

• Manufacturer Part Number: PCA9543AD,118
• Description: IC I2C SWITCH 2CH 14-SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9543AD,118

• Applications: 2-Channel I²C Multiplexer
• Interface: I²C, SMBus
• Voltage - Supply: 2.3 V ~ 5.5 V
• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Mounting Type: Surface Mount
• For Use With: OM6285 - EVAL BOARD I2C-2002-1A568-4002 - DEMO BOARD I2C568-3615 - DEMO BOARD I2C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-1857-2; 935275803118; PCA9543AD-T

NXP Semiconductors
PCA9543A_43B_43C_6
Product data sheet
6.2.1 Control register definition
6.2.2 Interrupt handling
One or several SCx/SDx downstream pair, or channel, is selected by the contents of the
control register. This register is written after the PCA9543A has been addressed. The
2 LSBs of the control byte are used to determine which channel is to be selected. When a
channel is selected, the channel will become active after a STOP condition has been
placed on the I
the channel is made active, so that no false conditions are generated at the time of
connection.
Table 4.
Remark: Channel 0 and channel 1 can be enabled at the same time. Care should be
taken not to exceed the maximum bus capacitance.
The PCA9543A provides 2 interrupt inputs, one for each channel, and one open-drain
interrupt output. When an interrupt is generated by any device, it will be detected by the
PCA9543A and the interrupt output will be driven LOW. The channel need not be active
for detection of the interrupt. A bit is also set in the control register.
Bit 4 and bit 5 of the control register corresponds to the INT0 and INT1 inputs of the
PCA9543A, respectively. Therefore, if an interrupt is generated by any device connected
to channel 1, the state of the interrupt inputs is loaded into the control register when a
read is accomplished. Likewise, an interrupt on any device connected to channel 0 would
cause bit 4 of the control register to be set on the read. The master can then address the
PCA9543A and read the contents of the control register to determine which channel
contains the device generating the interrupt. The master can then reconfigure the
PCA9543A to select this channel, and locate the device generating the interrupt and
clear it.
It should be noted that more than one device can provide an interrupt on a channel, so it is
up to the master to ensure that all devices on a channel are interrogated for an interrupt.
The interrupt inputs may be used as general purpose inputs if the interrupt function is not
required.
If unused, interrupt input(s) must be connected to V
Table 5.
D7
X
X
0
7
X
X
D6
X
X
0
6
X
X
Control register: Write—channel selection; Read—channel status
Control register: Read—interrupt
2
C-bus. This ensures that all SCx/SDx lines will be in a HIGH state when
INT1
X
X
0
INT1
X
0
1
Rev. 06 — 15 June 2009
INT0
X
X
0
INT0
0
1
X
2-channel I
D3
X
X
0
3
X
X
D2
X
X
0
2
X
X
2
C-bus switch with interrupt logic and reset
B1
X
0
1
0
B1
X
X
PCA9543A/43B/43C
DD
B0
0
1
X
0
B0
X
X
through a pull-up resistor.
Command
channel 0 disabled
channel 0 enabled
channel 1 disabled
channel 1 enabled
no channel selected;
power-up/reset default state
Command
no interrupt on channel 0
interrupt on channel 0
no interrupt on channel 1
interrupt on channel 1
© NXP B.V. 2009. All rights reserved.
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