UJA1069TW24/3V3:51 NXP Semiconductors, UJA1069TW24/3V3:51 Datasheet - Page 19

• Manufacturer Part Number: UJA1069TW24/3V3:51
• Description: IC LIN FAIL-SAFE 24-HTSSOP
• Manufacturer: NXP Semiconductors

Specifications of UJA1069TW24/3V3:51

• Applications: Automotive
• Interface: LIN (Local Interconnect Network)
• Voltage - Supply: 3.3V
• Package / Case: 24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935280014518; UJA1069TW24/3V3-T; UJA1069TW24/3V3-T

NXP Semiconductors
UJA1069_3
Product data sheet
6.7.1.1 Active mode
6.7.1.2 Off-line mode
6.7.2 LIN wake-up
In Active mode the LIN transceiver can transmit data to and receive data from the LIN bus.
To enter Active mode the LMC bit must be set in the Physical Layer register and the SBC
must be in Normal mode or Flash mode.
The LTC bit can be used to set the LIN transceiver to a Listen-only mode. The transmitter
output stage is disabled in this mode.
When leaving Active mode the LIN transmitter is disabled and the LIN receiver is
monitoring the LIN-bus for a valid wake-up.
Off-line mode is the low-power mode of the LIN transceiver. The LIN transceiver is
disabled to save supply current. Pin RXDL reflects any wake-up event at the LIN-bus.
For a remote wake-up via LIN a LIN-bus signal is required as shown in
Fig 9. States LIN transceiver
power-on
Rev. 03 — 10 September 2007
Normal or Flash mode
AND LMC = 1
SBC enters
transmitter: ON/OFF (LTC)
RXDL: wake-up status
RTLIN: 75 A/OFF
RTLIN: ON/75 A
receiver: wake-up
RXDL: bitstream
transmitter: OFF
Off-line mode
Active mode
receiver: ON
Restart or Fail-safe mode
Stand-by, Start-up,
OR LMC = 0
SBC enters
LIN fail-safe system basis chip
Fail-safe mode
SBC enters
001aad184
UJA1069
© NXP B.V. 2007. All rights reserved.
Figure
10.
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