UJA1069TW24/3V3:51 NXP Semiconductors, UJA1069TW24/3V3:51 Datasheet - Page 21

• Manufacturer Part Number: UJA1069TW24/3V3:51
• Description: IC LIN FAIL-SAFE 24-HTSSOP
• Manufacturer: NXP Semiconductors

Specifications of UJA1069TW24/3V3:51

• Applications: Automotive
• Interface: LIN (Local Interconnect Network)
• Voltage - Supply: 3.3V
• Package / Case: 24-TSSOP Exposed Pad, 24-eTSSOP, 24-HTSSOP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935280014518; UJA1069TW24/3V3-T; UJA1069TW24/3V3-T

NXP Semiconductors
UJA1069_3
Product data sheet
6.7.6.1 TXDL dominant clamping
6.7.6.2 LIN dominant clamping
6.7.6.3 LIN recessive clamping
6.7.5 LIN driver capability
6.7.6 Bus and TXDL failure detection
6.8 Inhibit and limp-home output
Setting the LDC bit in the Physical Layer Control register will increase the driver capability
of the LIN output stage. This feature is used in auto-addressing systems, where the
standard LIN 2.0 drive capability is insufficient.
The SBC handles and reports the following LIN-bus related failures:
These failure events force an interrupt to the microcontroller whenever the status changes
and the corresponding interrupt is enabled.
If the TXDL pin is clamped dominant for longer than t
disabled. After the TXDL pin becomes recessive the transmitter is reactivated
automatically when detecting bus activity or manually by setting and clearing the LTC bit.
When the LIN-bus is clamped dominant for longer than t
t
If the LIN bus pin is clamped recessive while TXDL is driven dominant the LIN transmitter
is disabled. The transmitter is reactivated automatically when the LIN bus becomes
dominant or manually by setting and clearing the LTC bit.
The INH/LIMP output pin is a 3-state output pin which can be used either as an inhibit for
an extra (external) voltage regulator, or as a ‘limp-home’ output. The pin is controlled via
the ILEN bit and ILC bit in the System Configuration register; see
TXDL(dom)(dis)
•
•
•
LIN-bus shorted to ground
LIN-bus shorted to V
TXDL clamped dominant; the transmitter is disabled
), the state of the LIN termination is changed according to
Rev. 03 — 10 September 2007
BAT14
or V
BAT42
; the transmitter is disabled
TXDL(dom)(dis)
LIN(dom)(det)
LIN fail-safe system basis chip
the LIN transmitter is
Figure
(which is longer than
UJA1069
© NXP B.V. 2007. All rights reserved.
Figure
12.
11.
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