AN983BX-BG-T-V3 Infineon Technologies, AN983BX-BG-T-V3 Datasheet - Page 48

• Manufacturer Part Number: AN983BX-BG-T-V3
• Description: IC PCI TO ETHERNET LAN 128-PQFP
• Manufacturer: Infineon Technologies

Specifications of AN983BX-BG-T-V3

• Applications: Ethernet Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 128-BFQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AN983BXBGTV3; SP000103413

Power Management Register 0
PMR0_CR48
Power Management Register 0
Field
PMES
D2S
D1S
AUXC
DSI
Res
PMEC
VER
NIP
CAPID
Data Sheet
Bits
31:27
26
25
24:22
21
20
19
18:16
15:8
7:0
Type
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
Registers and Descriptors DescriptionAN983B/BX Configuration Registers
Description
PME Support
The AN983B/BX will assert PME# signal while in the D0, D1, D2, D3
power state. The AN983B/BX supports Wake-up from the above states.
D2 Support
The AN983B/BX supports D2 Power Management State.
D1 Support
The AN983B/BX supports D1 Power Management State.
Aux Current
These three bits report the maximum 3.3 Vaux current requirements for
AN983B/BX. If bit 31 of PMR0 is ‘1’, the default value is 0101b, means
AN983B/BX need 100 mA to support remote wake-up in D3 cold power
state.
Device Specific Initialization
The Device Specific Initialization bit indicates whether special
initialization of this function is required before the generic class device
driver is able to use it.
0
Reserved
PME Clock
When “1” indicates that the AN983B/BX relies on the presence of the PCI
clock for PME# operation. While “0” indicates the no PCI clock is required
for the AN983B/BX to generate PME#.
Version
The value of 010b indicates that the AN983B/BX complies with Revision
1.1 of the PCI Power Management Interface Specification.
Next Item Pointer
This value is always 0h, indicates that there are no additional items in the
Capabilities List.
Capability Identifier
This value is always 01h, indicates the link list item as being PCI Power
Management Registers.
B
initialization sequence following transition to the D0 un-initialized
state
, indicates that the function does not require a device specific
Offset
C0
48
H
Rev. 1.81, 2005-12-15
AN983B/BX
Reset Value
FE82 0001
H