DG403DYZ Intersil, DG403DYZ Datasheet - Page 6

IC SWITCH DUAL DPST 16SOIC

DG403DYZ

Manufacturer Part Number
DG403DYZ
Description
IC SWITCH DUAL DPST 16SOIC
Manufacturer
Intersil
Datasheet

Specifications of DG403DYZ

Function
Switch
Circuit
2 x DPST - NC/NO
On-state Resistance
45 Ohm
Voltage Supply Source
Single, Dual Supply
Voltage - Supply, Single/dual (±)
5 V ~ 34 V, ±5 V ~ 17 V
Current - Supply
0.1µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Test Circuits and Waveforms
Application Information
Dual Slope Integrators
The DG403 is well suited to configure a selectable slope
integrator. One control signal selects the timing capacitor C
or C
preparation for the next integration cycle.
TTL
SIGNAL
GENERATOR
ANALYZER
2
. Another one selects e
INTEGRATE/
e
SELECT
IN
SCOPE
FIGURE 6. CROSSTALK TEST CIRCUIT
FIGURE 8. DUAL SLOPE INTEGRATOR
RESET
0V, 2.4V
R
L
S
S
IN
S
S
IN
C
1
3
2
4
1
2
+5V
IN
V+
V
V
V
GND
S1
D2
1
IN
L
6
GND
+15V
or discharges the capacitor in
DG403
+15V
-15V
D
D
D
D
1
2
3
4
-15V
V+
V-
+5V
V-
V
C
C
S2
1
2
V
IN
D1
V
2
(Continued)
L
C
C
0V, 2.4V
50Ω
e
NC
OUT
1
Peak Detector
A
operating SW
compared to the analog input e
A
to the analog input voltage. When e
goes negative, turning SW
store the most positive analog input experienced.
3
3
IMPEDANCE
ANALYZER
e
acting as a comparator provides the logic drive for
is high keeping SW
IN
FIGURE 7. CAPACITANCES TEST CIRCUIT
+
-
+
-
FIGURE 9. POSITIVE PEAK DETECTOR
A
A
1
3
1
. The output of A
RESET
1
C
closed. This allows C
1
DG401
V+
off. The system will therefore
SW
SW
V
V
S
D
IN
GND
2
2
1
+15V
. If e
is fed back to A
IN
R
IN
goes below e
1
C
> e
1
-15V
+5V
OUT
IN
V-
X
1
November 20, 2006
to charge up
V
the output of
0V, 2.4V
AS REQUIRED
L
A
+
3
-
2
and
OUT
FN3284.11
C
C
e
OUT
, A
3

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