WJLXT972ALC.A4 S E001 Intel, WJLXT972ALC.A4 S E001 Datasheet - Page 31
WJLXT972ALC.A4 S E001
Manufacturer Part Number
WJLXT972ALC.A4 S E001
Description
Manufacturer
Intel
Datasheet
1.WJLXT972ALC.A4_S_E001.pdf
(97 pages)
Specifications of WJLXT972ALC.A4 S E001
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5.4
Datasheet
Document Number: 249186-004
Revision Date: 25-Oct-2005
Initialization
This section includes the following topics:
When the LXT972A Transceiver is first powered on, reset, or encounters a link failure state, it
checks the MDIO register configuration bits to determine the line speed and operating conditions
to use for the network link.
Figure 6
may be set by the Hardware Control or MDIO interface.
•
•
•
•
Section 5.4.1, “MDIO Control Mode and Hardware Control Mode”
Section 5.4.2, “Reduced-Power Modes”
Section 5.4.3, “Reset for Intel® LXT972A Transceiver”
Section 5.4.4, “Hardware Configuration Settings”
shows the initialization sequence for the LXT972A Transceiver. The configuration bits
Intel
®
LXT972A Single-Port 10/100 Mbps PHY Transceiver
31
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