TE28F800B3B110 Intel, TE28F800B3B110 Datasheet

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TE28F800B3B110

Manufacturer Part Number
TE28F800B3B110
Description
Manufacturer
Intel
Datasheet

Specifications of TE28F800B3B110

Lead Free Status / Rohs Status
Not Compliant

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Part Number
Manufacturer
Quantity
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Part Number:
TE28F800B3B110
Manufacturer:
SAMSUNG
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5 120
Intel
Memory (B3)
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
Product Features
The Intel
and 0.18 µm technologies, is a feature-rich solution at a low system cost. The B3 device in x16 is
available in 48-lead TSOP and 48-ball CSP packages. The x8 option of this product family is
available only in 40-lead TSOP and 48-ball µBGA* packages. For additional information about
this product family, see the Intel website: http://www.intel.com/design/flash.
Notice: This specification is subject to change without notice. Verify with your local Intel sales
office that you have the latest datasheet before finalizing a design.
— 2.7 V – 3.6 V read/program/erase
— 12 V V
— Reduces overall system power
— 2.7 V – 3.6 V: 70 ns max access time
— Eight 8-KB blocks for data, top or
— Up to 127 x 64-KB blocks for code
— V
— 9 mA typical read current
— V
— V
— –40 °C to +85 °C
— Status registers
Flexible SmartVoltage Technology
1.65 V – .5 V or 2.7 V – 3.6 V I/O option
High Performance
Optimized Block Sizes
Block Locking
Low Power Consumption
Absolute Hardware-Protection
Extended Temperature Operation
Automated Program and Block Erase
bottom locations
WP#
CC
PP
CC
®
®
-level control through Write Protect
= GND option
Advanced Boot Block Flash Memory (B3) device, manufactured on the Intel 0.13 µm
lockout voltage
PP
Advanced Boot Block Flash
fast production programming
—Flash Memory Manager
—System Interrupt Manager
—Supports parameter storage, streaming
—Minimum 100,000 block erase cycles
—Typical I
—48-Ball CSP packages
—40-Lead and 48-Lead TSOP packages
—8-, 16-, 32-, and 64-Mbit densities
—16-Mbit and 32-Mbit densities
—16-, 32-, and 64-Mbit densities
—8-, 16-, and 32-Mbit densities
Intel
Extended Cycling Capability
Automatic Power Savings Feature
Standard Surface Mount Packaging
Density and Footprint Upgradeable for
common package
ETOX™ VIII (0.13 µm) Flash
Technology
ETOX™ VII (0.18 µm) Flash Technology
ETOX ™ VI (0.25µm) Flash Technology
Bo not use the x8 option for new designs
data (for example, voice)
®
Order Number: 290580, Revision: 020
Flash Data Integrator Software
CCS
after bus inactivity
Datasheet
18 Aug 2005

Related parts for TE28F800B3B110

TE28F800B3B110 Summary of contents

Page 1

... TSOP and 48-ball µBGA* packages. For additional information about this product family, see the Intel website: http://www.intel.com/design/flash. Notice: This specification is subject to change without notice. Verify with your local Intel sales office that you have the latest datasheet before finalizing a design. ...

Page 2

... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800 548-4725 or by visiting Intel's website at http://www.intel.com. Intel, the Intel logo, and ETOX are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. ...

Page 3

... Power and Reset Specifications 9.1 Power-Up/Down Characteristics ......................................................................................... 47 9.1.1 RP# Connected to System Reset .......................................................................... 47 9.1 and RP# Transitions..............................................................................47 CC PP, 9.2 Reset Specifications ........................................................................................................... 48 9.3 Power Supply Decoupling................................................................................................... 49 Datasheet Intel .............................................................................................................. 8 .............................................................................................................. 9 ............................................................................................................ 24 ....................................................................................... 27 ...........................................................32 ..................................................................................................... 34 .....................................................................................47 ® Advanced Boot Block Flash Memory (B3) Order Number: 290580, Revision: 020 18 Aug 2005 3 ...

Page 4

... Program and Erase Voltages PP 13 for Complete Protection...................................................................................... 14.0 Additional Information Appendix A Write State Machine Current/Next States Appendix B Program and Erase Flowcharts Appendix C Ordering Information 18 Aug 2005 Intel 4 ........................................................................................................... 50 ................................................................................... 63 ........................................................................................................ 63 .................................................................... 66 ......................................................................................... 70 ® Advanced Boot Block Flash Memory (B3) Order Number: 290580, Revision: 020 ................................................. 64 Datasheet ...

Page 5

... Data sheet renamed from Smart 3 Advanced Boot Block 4-Mbit, 8-Mbit, 16-Mbit Flash -006 Memory Family. Added device ID information for 4-Mbit x8 device Removed 32-Mbit x8 to reflect product offerings Minor text changes Datasheet Intel Description into one specification (Section 4.4) CCW into one specification (Section 4.4) CCE /t ) reduced to 4 sec (Section 4 ...

Page 6

... Updated the layout of the datasheet. -019 Added line items to Table 34 “Ordering Information: Valid Combinations” on page -020 Removed all x8 products from ordering information, page 70 18 Aug 2005 Intel 6 Description ® Advanced Boot Block Flash Memory (B3) Order Number: 290580, Revision: 020 70. ...

Page 7

... Introduction This datasheet describes the specifications for the Intel Advanced Boot Block Flash Memory (B3) device (hereafter referred to as the B3 flash memory device). The B3 flash memory device is optimized for portable, low-power, systems. This family of products features 3.6 V I/Os, and a low V 2 ...

Page 8

... Bus Width Speed Memory Arrangement 1024 Kbit Mbit), 2048 Kbit x 8 (16 Mbit) 18 Aug 2005 Intel 8 Used interchangeably to refer to the external signal connections on the package. Note: For a chip scale package (CSP), the term ball is used in place of pin. Square brackets designate group membership or define a group of signals with similar function (for example, A[21:1], SR[4:1]) When referring to registers, the term set means the bit is a logical 1 ...

Page 9

... TSOP. 8-Mbit densities not available in µBGA* CSP Max is 3 0.25µm 32-Mbit devices. CC 3.0 Functional Overview Intel provides the most flexible voltage solution in the flash industry, providing three discrete voltage supply pins: • V for Read operation CC • V for output swing CCQ • ...

Page 10

... B3 Architecture Block Diagram V CCQ Power Reduction Control Y-Decoder Input Buffer Address Latch X-Decoder Address Counter 18 Aug 2005 Intel 10 47). explains the different modes of operation Output Buffer Identifier Register Status Register Data Comparator Y-Gating/Sensing ® Advanced Boot Block Flash Memory (B3) Order Number: 290580, Revision: 020 and Section 8.0, “ ...

Page 11

... Word-Wide Memory Addressing Map (Sheet 16-Mbit and 32-Mbit Word-Wide Memory Addressing Top Boot Size 16 Mbit (KW) 4 FF000-FFFFF 4 FE000-FEFFF 4 FD000-FDFFF 4 FC000-FCFFF Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Size 32 Mbit 8 Mbit (KW) 1FF000-1FFFFF 32 1FE000-1FEFFF 32 1FD000-1FDFFF 32 1FC000-1FCFFF 32 ® Advanced Boot Block Flash Memory (B3) ...

Page 12

... B8000-BFFFF 32 B0000-B7FFF 32 A8000-AFFFF 32 A0000-A7FFF 32 98000-9FFFF 32 90000-97FFF 32 88000-8FFFF 32 80000-87FFF 32 78000-7FFFF 32 70000-77FFF 32 68000-6FFFF 32 60000-67FFF 32 58000-5FFFF 32 50000-57FFF 32 48000-4FFFF 32 40000-47FFF 32 38000-3FFFF 32 30000-37FFF 32 28000-2FFFF 18 Aug 2005 Intel 12 Size 32 Mbit 8 Mbit (KW) 1FB000-1FBFFF 32 1FA000-1FAFFF 32 1F9000-1F9FFF 32 1F8000-1F8FFF 32 1F0000-1F7FFF 32 1E8000-1EFFFF 32 1E0000-1E7FFF 32 1D8000-1DFFFF 32 1D0000-1D7FFF 32 1C8000-1CFFFF 32 1C0000-1C7FFF 32 1B8000-1BFFFF 32 1B0000-1B7FFF 32 1A8000-1AFFFF 32 1A0000-1A7FFF 32 198000-19FFFF 32 ...

Page 13

... This column continues on next page Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Size 32 Mbit 8 Mbit (KW) 120000-127FFF 32 118000-11FFFF 32 110000-117FFF 32 108000-10FFFF 32 100000-107FFF 32 This column continues on next page 0F8000-0FFFFF 32 0F0000-0F7FFF 32 0E8000-0EFFFF 32 0E0000-0E7FFF 32 0D8000-0DFFFF 32 0D0000-0D7FFF 32 0C8000-0CFFFF 32 0C0000-0C7FFF 32 0B8000-0BFFFF 32 0B0000-0B7FFF 32 0A8000-0AFFFF ...

Page 14

... Aug 2005 Intel 14 Bottom Boot Size 8 Mbit 16 Mbit (KW) 4 07000-07FFF 4 06000-06FFF 4 05000-05FFF 4 04000-04FFF 4 03000-03FFF 4 02000-02FFF 4 01000-01FFF 4 00000-00FFF 4-Mbit and 8-Mbit Word-Wide Memory Addressing Size 4 Mbit (KW) ...

Page 15

... E8000-EFFFF 1EFFFF 1E0000- 32 E0000-E7FFF 1E7FFF 1D8000- 32 D8000-DFFFF 1DFFFF 1D0000- 32 D0000-D7FFF 1D7FFF 1C8000- 32 C8000-CFFFF 1CFFFF 1C0000- 32 C0000-C7FFF 1C7FFF 1B8000- 32 B8000-BFFFF 1BFFFF Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Size 4 Mbit (KW) 4 02000-02FFF 4 01000-01FFF 4 00000-00FFF Size 64 Mbit 16 Mbit (KW) 3FF000-3FFFFF 32 3FE000-3FEFFF 32 3FD000-3FDFFF 32 3FC000-3FCFFF 32 3FB000-3FBFFF 32 3FA000-3FAFFF 32 ...

Page 16

... Aug 2005 Intel 16 Size 64 Mbit 16 Mbit (KW) 3B0000-3B7FFF 32 3A8000-3AFFFF 32 3A0000-3A7FFF 32 398000-39FFFF 32 390000-397FFF 32 388000-38FFFF 32 380000-387FFF 32 378000-37FFFF 32 370000-377FFF 32 368000-36FFFF 32 360000-367FFF 32 358000-35FFFF 32 350000-357FFF ...

Page 17

... Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Size 64 Mbit 16 Mbit (KW) 308000-30FFFF 32 300000-307FFF 32 2F8000-2FFFFF 32 2F0000-2F7FFF 32 2E8000-2EFFFF 32 2E0000-2E7FFF 32 2D8000-2DFFFF 32 2D0000-2D7FFF 32 2C8000-2CFFFF 32 2C0000-2C7FFF 32 2B8000-2BFFFF 32 2B0000-2B7FFF 32 2A8000-2AFFFF ...

Page 18

... Aug 2005 Intel 18 Size 64 Mbit 16 Mbit (KW) 260000-267FFF 32 258000-25FFFF 32 250000-257FFF 32 248000-24FFFF 32 240000-247FFF 32 238000-23FFFF 32 230000-237FFF 32 228000-22FFFF 32 220000-227FFF 32 218000-21FFFF 32 210000-217FFF 32 208000-21FFFF 32 200000-207FFF 32 1F8000-1FFFFF 32 1F0000-1F7FFF 32 1E8000-1EFFFF 32 1E0000-1E7FFF ...

Page 19

... Word-Wide Memory Addressing Top Boot Size 16 Mbit 32 Mbit (KW Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Size 64 Mbit 16 Mbit (KW) 1A0000-1A7FFF 32 198000-19FFFF 32 190000-197FFF 32 188000-18FFFF 32 180000-187FFF 32 178000-17FFFF 32 170000-177FFF 32 168000-16FFFF 32 160000-167FFF 32 158000-15FFFF 32 150000-157FFF 32 148000-14FFFF 32 140000-147FFF 32 138000-13FFFF 32 130000-137FFF 32 F8000-FFFFF 128000-12FFFF 32 F0000-F7FFF 120000-127FFF 32 E8000-EFFFF ...

Page 20

... Byte-Wide Memory Addressing Map (Sheet 8-Mbit and 16-Mbit Byte-Wide Byte-Wide Memory Addressing Top Boot Size (KB) 8 Mbit 8 FE000-FFFFF 8 FC000-FDFFF 8 FA000-FBFFF 8 F8000-F9FFF 8 F6000-F7FFF 8 F4000-F5FFF 8 F2000-F3FFF 8 F0000-F1FFF 18 Aug 2005 Intel 20 Size 64 Mbit 16 Mbit (KW) 088000-08FFFF 32 50000-57FFF 080000-087FFF 32 48000-4FFFF 078000-07FFFF 32 40000-47FFF 070000-077FFF 32 38000-3FFFF 068000-06FFFF 32 30000-37FFF 060000-067FFF ...

Page 21

... B0000-BFFFF 64 A0000-AFFFF 64 90000-9FFFF 64 80000-8FFFF 64 70000-7FFFF 64 60000-6FFFF 64 50000-5FFFF 64 40000-4FFFF 64 30000-3FFFF 64 20000-2FFFF 64 10000-1FFFF 64 00000-0FFFF Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 16 Mbit Size (KB) 1E0000-1EFFFF 64 1D0000-1DFFFF 64 1C0000-1CFFFF 64 1B0000-1BFFFF 64 1A0000-1AFFFF 64 190000-19FFFF 64 180000-18FFFF 64 170000-17FFFF 64 160000-16FFFF 64 150000-15FFFF 64 140000-14FFFF 64 130000-13FFFF 64 120000-12FFFF 64 110000-11FFFF 64 100000-10FFFF 64 0F0000-0FFFFF 64 0E0000-0EFFFF 64 0D0000-0DFFFF 64 0C0000-0CFFFF 64 0B0000-0BFFFF 64 0A0000-0AFFFF ...

Page 22

... Table 7. 8-Mbit and 16-Mbit Byte-Wide Memory Addressing Map (Sheet 8-Mbit and 16-Mbit Byte-Wide Byte-Wide Memory Addressing Top Boot Size (KB) 8 Mbit Aug 2005 Intel 22 16 Mbit Size (KB ® Advanced Boot Block Flash Memory (B3) Order Number: 290580, Revision: 020 Bottom Boot ...

Page 23

... Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 4-Mbit Byte-Wide Memory Addressing Size 4 Mbit (KB) 64 70000-7FFFF 64 60000-6FFFF 64 50000-5FFFF 64 40000-4FFFF 64 30000-3FFFF 64 20000-2FFFF 64 10000-1FFFF 8 0E000-0FFFF 8 0C000-0DFFF 8 0A000-0BFFF 8 08000-09FFF 8 06000-07FFF 8 04000-05FFF ...

Page 24

... Corner to Ball A1 Distance Along D 8M (.25) Corner to Ball A1 Distance Along D 16M (.25/.18/.13) 32M (.18/.13) Corner to Ball A1 Distance Along D 64M (.18) Corner to Ball A1 Distance Along E 8M (.25) Corner to Ball A1 Distance Along E 16M (.25/.18/.13) 32M (.18/.13) Corner to Ball A1 Distance Along E 32M (.25) Corner to Ball A1 Distance Along E 64M (.18) 18 Aug 2005 Intel ...

Page 25

... Lead to Package Offset Notes: 1. One dimple on package denotes Pin two dimples, then the larger dimple denotes Pin 1. 3. Pin the upper left corner of the package, in reference to the product mark. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 See Notes and See Det ail A A ...

Page 26

... Package Body Width Package Body Length Pitch Ball (Lead) Count Seating Plane Coplanarity Corner to Ball A1 Distance Along D Corner to Ball A1 Distance Along E Note: (1) Package dimensions are for reference only. These dimensions are estimates based on die size, and are subject to change. 18 Aug 2005 Intel ...

Page 27

... Notes: 1. 40-Lead TSOP available for 8-Mbit and 16-Mbit densities only. 2. Lower densities have NC on the upper address pins. For example, an 8-Mbit device has NC on Pin 38. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Figure 5). Figure 6). Figure 8 and x16 in Figure 9). Figure 9 Advanced Boot Block ...

Page 28

... New Mark: Note: The topside marking on 8-Mb, 16-Mb, and 32-Mb Intel Advanced Boot Block 40L and 48L TSOP products changed to a white ink triangle as a Pin-1 indicator. Products without the white triangle continue to use a dimple as a Pin-1 indicator. No other changes were made in package size, materials, functionality, customer handling, or manufacturability ...

Page 29

... GND Notes: 1. A19 and A20 indicate the upgrade address connections. Lower density devices do not have the upper address solder balls. Do not route is not done in this area. A device. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Ordering Information Valid Combinations TE28F640B3TC70 TE28F320B3TD70 TE28F320B3TC70 TE28F320B3TC90 ...

Page 30

... A is the upgrade address for the 64-Mbit device Table 10 “B3 Flash memory Device Signal Descriptions” on page 31 pin. 5.2 Signal Descriptions Table 10 describes the active signals. 18 Aug 2005 Intel A13 A11 A8 V WP# PP A14 ...

Page 31

... Input power operation (see CCQ This input can be tied directly Power DEVICE Power Supply Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Description ). CCD for details on write protection. : Enables all outputs to be driven to 1 2.5 V while the regulated can be driven achieve lowest CCQ Section 7.2, “ ...

Page 32

... Stressing the flash memory device beyond the Absolute Maximum Ratings in permanent damage. These ratings are stress ratings only. NOTICE: Specifications are subject to change without notice. Verify with your local Intel Sales office that you have the latest datasheet before finalizing a design Table 11 ...

Page 33

... 11.4 V–12.6 V can be applied during a program/erase only for a maximum of PP 1000 cycles on the main blocks and 2500 cycles on the parameter blocks. V connected for a total of 80 hours maximum. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Parameter Min –40 2.7 3.0 2.7 1.65 1.8 1 ...

Page 34

... Current for 0.13 and 0.18 Micron Product I / CCES I CCWS V Erase Suspend CC Current for 0.25 Micron Product I V Read Current PPR PP 18 Aug 2005 Intel 34 V 2.7 V–3.6 V 2.7 V–2. 2.7 V–3.6 V 1.65 V–2.5 V CCQ Note Typ Max Typ Max ± 1 ± 1 1,2 ± ...

Page 35

... CCES CCWS – If the device is read while in erase suspend, the current draw is the sum of I – If the device is read while in program suspend, the current draw is the sum of I Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 V 2.7 V–3.6 V 2.7 V–2. 2.7 V– ...

Page 36

... Lock Voltage Notes: 1. Erase and Program are inhibited when 11.4 V–12.6 V can be applied during program/erase only for a maximum of 1000 cycles on the main blocks and PP 2500 cycles on the parameter blocks Aug 2005 Intel 36 2.7 V–2.85 V 1.65 V–2.5 V Max Min Max –0.4 0.4 ...

Page 37

... ELQV– 2. Sampled, but not 100% tested. 3. See Figure 10 “Read Operation Waveform” on page 4. See Figure 12 “AC Input/Output Reference Waveform” on page 46 input slew rate. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Density 3.0 V – 3.6 V 2.7 V – 3 Note Min Max Min ...

Page 38

... OE# can be delayed ELQV– 2. Sampled, but not 100% tested. 3. See Figure 10 “Read Operation Waveform” on page 4. See Figure 12 “AC Input/Output Reference Waveform” on page 46 input slew rate. 18 Aug 2005 Intel 38 16 Mbit 2.7 V–3.6 3.0 V–3.6 2.7 V–3 Max Min ...

Page 39

... ELQV– 2. Sampled, but not 100% tested. 3. See Figure 10 “Read Operation Waveform” on page 4. See Figure 12 “AC Input/Output Reference Waveform” on page 46 allowable input slew rate. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 32 Mbit 90 ns 100 ns 2.7 V–3.6 3.0 V–3.3 2.7 V–3 ...

Page 40

... Figure 12 “AC Input/Output Reference Waveform” on page 46 maximum allowable input slew rate. Figure 10. Read Operation Waveform Address [A] CE# [E] OE# [G] WE# [W] Data [D/Q] RST# [P] 18 Aug 2005 Intel 40 Density Product Parameter after the falling edge of CE# without impact on t ELQV– GLQV 40 ...

Page 41

... Table 27 “Bus Operations 3. Sampled, but not 100% tested. 4. See Figure 12 “AC Input/Output Reference Waveform” on page 46 input slew rate. 5. See Figure 11 “Write Operations Waveform” on page 45 Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Density Product 3.0 V – 3 2.7 V – 3.6 V Note 4,5 4,5 ...

Page 42

... Refer to Table 27 “Bus Operations 3. Sampled, but not 100% tested. 4. See Figure 12 “AC Input/Output Reference Waveform” on page 46 input slew rate. 5. See Figure 11 “Write Operations Waveform” on page 45 18 Aug 2005 Intel 42 Density Product 70 ns 3.0 V – 3 2.7 V – 3 Note Min 4,5 ...

Page 43

... Sampled, but not 100% tested. 4. See Figure 12 “AC Input/Output Reference Waveform” on page 46 input slew rate. 5. See Figure 11 “Write Operations Waveform” on page Max = 3.3 V for 32-Mbit 0.25 Micron product. CC Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Density Product 3.0 V – 3 2.7 V – 3 ...

Page 44

... WE# going low (whichever goes low last Refer to Table 27 “Bus Operations 3. Sampled, but not 100% tested. 4. See Figure 12 “AC Input/Output Reference Waveform” on page 46 input slew rate. 5. See Figure 11 “Write Operations Waveform” on page 45 18 Aug 2005 Intel 44 Parameter WLWH ELEH WLEH ...

Page 45

... EHQV3 Erase Time Program Suspend Latency WHRH1 EHRH1 Erase Suspend Latency WHRH2 EHRH2 Notes: 1. Typical values measured Excludes external system-level overhead. 3. Sampled, but not 100% tested. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 W10 V PP Parameter Note 1,3 1,3 = +25 °C and nominal voltages. ...

Page 46

... L 8.5 Device Capacitance ° MHz A Table 25. Device Capacitance Symbol Output Capacitance OUT § Sampled, not 100% tested. 18 Aug 2005 Intel CCQ /2. Input rise and fall times (10% to 90%) < 5 ns. CCQ = V Min CCQ Device Under Test C L for component values. ...

Page 47

... V CC After any program or Block-Erase operation is complete (even after the CUI must be reset to read-array mode, using the Read Array command if access to the PPLK flash-memory array is required. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 and V must power-down together. CC CCQ with or slightly after V . Conversely, V ...

Page 48

... PLPH 2. If RP# is asserted while a Block Erase or Word Program operation is not executing, the reset completes within 100 ns. 3. Sampled, but not 100% tested. Figure 14. Deep Power-Down/Reset Operations Waveforms 18 Aug 2005 Intel 48 Parameter , this specification is not RP# ( ...

Page 49

... System engineers must analyze the breakdown of standby time versus active time and quantify the respective power consumption in each mode for their specific application. This approach provides a more accurate measure of application-specific power and energy requirements. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 ). CCS ) ...

Page 50

... CUI signals the start of an operation and the Status Register reports status. The CUI handles the WE# interface to the data and address latches, and system status requests during WSM operation. 18 Aug 2005 Intel 50 37 the flash memory device executes only the following commands successfully: ® ...

Page 51

... CE# is the device selection control. When active, CE# enables the flash memory device. • OE# is the data output control, and drives the selected memory data onto the I/O bus. For all read modes, WE# and RP# must Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Note RP# CE# 2– ...

Page 52

... Intel Flash memories allow proper CPU initialization after a system reset, using the RP# input. In this application, RP# is controlled by the same RESET# signal that resets the system CPU. 18 Aug 2005 Intel 52 ), the flash memory device outputs are disabled. Output pins IH for time t ...

Page 53

... Table 28 “Command Codes and Descriptions” on page 54 these modes. Appendix A, “Write State Machine Current/Next States,” state transitions. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Appendix A ® Advanced Boot Block Flash Memory (B3) Order Number: 290580, Revision: 020 provides detailed information about ...

Page 54

... Command Codes and Descriptions (Sheet Code Device Mode 00, 01, Invalid/ Unassigned commands that must not be used. Intel reserves the right to redefine these codes 60, 2F, Reserved for future functions. C0, 98 Places the flash memory device in read-array mode, so that array data is output on the data ...

Page 55

... Status Register to 1. However, the WSM cannot clear these bits Register to 0. Issuing this command clears these bits to 0. Places the flash memory device into the intelligent-identifier-read mode, so that reading the 90 Read Identifier device outputs the manufacturer and device codes (A device ...

Page 56

... When the WSM is active, SR.7 indicates the status of the WSM. The remaining bits in the Status Register indicate whether the WSM was successful in performing the preferred operation (see Table 31 on page 60). 18 Aug 2005 Intel 56 29, once in read-identifier mode: Device Identifier -T (Top Boot) ...

Page 57

... Clear the Status Register before attempting the next operation. Any CUI instruction can follow after programming is completed; however, to prevent inadvertent Status Register reads, be sure to reset the CUI to read-array mode. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 was not within acceptable limits, and the WSM did not execute the PP ® ...

Page 58

... Erases all bits within the block Verifies that all bits within the block are sufficiently erased. While the erase executes, status bit Aug 2005 Intel 58 specifies the program- suspend latency. level used for program while in program-suspend mode. RP# PP IH. ® ...

Page 59

... IH Erase Resume continues the erase sequence when CE operation, the Status Register must be read and cleared before the next instruction is issued. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 supply voltage was not within acceptable PP ® Advanced Boot Block Flash Memory (B3) Order Number: 290580, Revision: 020 ...

Page 60

... Clear Status Register Program Block Erase/Confirm Program/Erase Suspend Program/Erase Resume Notes: PA: Program Address IA: Identifier Address 1. Bus operations are defined in 2. Following the Intelligent Identifier command, two Read operations access manufacturer and device codes. – for manufacturer code. 0 – for device code. 0 – A – ...

Page 61

... Operation aborted operation to locked blocks SR.0 = RESERVED FOR FUTURE ENHANCEMENTS (R) Note: A Command Sequence Error is indicated when SR.4, SR.5, and SR.7 are set. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 The V status bit does not continuously indicate the V PP The WSM interrogates the V ...

Page 62

... Write-Protection Truth Table for the B3 Device Family V WP ≥ PPLK IL ≥ PPLK IH 18 Aug 2005 Intel 62 ; any program or Erase operation to a locked IL RP# Write Protection Provided V All Blocks Locked IL V All Blocks Locked IH V Lockable Blocks Locked IH V All Blocks Unlocked IH ® ...

Page 63

... Intel or distribution sales office. 2. Visit the Intel home page at http://www.Intel.com 3. For the most current information about Intel Advanced Boot Block Flash memory and Intel Advanced+ Boot Block Flash memory, visit http://developer.intel.com/design/flash/ Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 ...

Page 64

... Status Erase Command Error Setup Erase Cant. Read “1” Status Error Array Erase “0” Status (continue) 18 Aug 2005 Intel 64 Command Input (and Next State) Program Erase Erase Prog/Ers Setup Setup Confirm Suspend (10/40H) (20H) (D0H) (B0H) Program ...

Page 65

... Susp. Susp. to “1” Identifier to Read Read Identifier Array Erase Read “1” Status (complete) Array Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Command Input (and Next State) Program Erase Erase Prog/Ers Setup Setup Confirm Suspend (10/40H) (20H) (D0H) (B0H) Erase Erase Susp ...

Page 66

... FULL STATUS CHECK PROCEDURE Read Status Register Data (See Above Program Successful 18 Aug 2005 Intel 66 Bus Operation Write Write Read Standby Repeat for subsequent programming operations Full Status Check can be done after each program or after a sequence of program operations. Write FFH after the last program operation to reset device to read array mode. ...

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... Read Status Register SR SR Write FFH Read Array Data Done Reading Yes Write D0H Program Resumed Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Operation 0 0 Program Completed No Write FFH Read Array Data ® Advanced Boot Block Flash Memory (B3) Order Number: 290580, Revision: 020 Bus ...

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... FULL STATUS CHECK PROCEDURE Read Status Register Data (See Above) SR SR Block Erase Successful 18 Aug 2005 Intel 68 Bus Operation Write Write Read Suspend Erase Loop Standby No 0 Yes Suspend Erase Repeat for subsequent block erasures. Full Status Check can be done after each block erase or after a sequence of block erasures ...

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... Start Write B0H Write 70H Read Status Register SR SR Write FFH Read Array Data Done Reading Yes Write D0H Erase Resumed Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 Bus Operation Write Write Read Standby 0 Standby Write 0 Erase Completed Read Write No Write FFH Read Array Data ® ...

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... GT = 48- Ball µBGA * CSP BGA CSP RC = Easy BGA Free Easy BGA Free VFBGA Free TSOP Product line designator ® for all Intel Flash products Device Density 640 = x16 (64 Mbit ) 320 = x16 (32 Mbit ) 160 = x16 (16 Mbit ) 800 = x16 (8 Mbit ) Ordering Information: Valid Combinations Table 34 ...

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... E for engineering samples, or – S for silicon daisy-chain samples. All other assembly codes without the first character are production units. 3. Intel recommends using.18 µm Intel Advanced Boot Block Products. Datasheet Intel 28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3 48-Lead TSOP 48-Ball µBGA CSP ...

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