JS28F320C3BD70 Micron Technology Inc, JS28F320C3BD70 Datasheet - Page 47

• Manufacturer Part Number: JS28F320C3BD70
• Manufacturer: Micron Technology Inc

Specifications of JS28F320C3BD70

• Density: 32Mb
• Access Time (max): 70ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 21b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 2M
• Supply Current: 18mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Compliant

C3 Discrete
Table 25: Status Register Bit Definition
March 2008
290645-24
SR[7] WRITE STATE MACHINE STATUS (WSMS)
SR[6] = ERASE-SUSPEND STATUS (ESS)
SR[5] = ERASE STATUS (ES)
SR[4] = PROGRAM STATUS (PS)
SR[3] = V
SR[2] = PROGRAM SUSPEND STATUS (PSS)
SR[1] = BLOCK LOCK STATUS
aborted.
SR[0] = RESERVED FOR FUTURE ENHANCEMENTS (R)
Note:
0 = Program in Progress/Completed
1 = Prog/Erase attempted on a locked block; Operation
0 = No operation to locked blocks
1 = Ready
0 = Busy
1 = Erase Suspended
0 = Erase In Progress/Completed
1 = Error In Block Erase
0 = Successful Block Erase
1 = Error in Programming
0 = Successful Programming
1 = V
0 = V
1 = Program Suspended
WSMS
PP
PP
7
A Command-Sequence Error is indicated when SR[4], SR[5], and SR[7] are set.
OK
Low Detect, Operation Abort
PP
STATUS (VPPS)
ESS
6
ES
5
PS
4
Before checking program or erase- status bits, check the Write
State Machine bit first to determine Word Program or Block
Erase completion.
When Erase Suspend is issued, WSM halts execution and sets
both WSMS and ESS bits to “1.” ESS bit remains set to “1” until
an Erase Resume command is issued.
When this bit is set to “1,” WSM has applied the maximum
number of erase pulses to the block and is still unable to verify
successful block erasure.
When this bit is set to “1,” WSM has attempted but failed to
program a word/byte.
The V
level. The WSM interrogates V
Erase command sequences have been entered and informs the
system if V
checked before the operation is verified by the WSM. The V
status bit is not guaranteed to report accurate feedback
between V
When Program Suspend is issued, WSM halts execution and
sets both WSMS and PSS bits to “1.” PSS bit remains set to “1”
until a Program Resume command is issued.
If a Program or Erase operation is attempted to one of the
locked blocks, this bit is set by the WSM. The operation
specified is aborted and the device is returned to read status
mode.
This bit is reserved for future use and should be masked out
when polling the Status Register.
VPPS
PP
3
status bit does not provide continuous indication of V
PPLK
PP
has not been switched on. The V
and V
PP1
PSS
2
Min.
NOTES:
PP
level only after the Program or
BLS
1
PP
is also
Datasheet
R
0
PP
PP
47