DS21552L+ Maxim Integrated Products, DS21552L+ Datasheet - Page 116

• Manufacturer Part Number: DS21552L+
• Description: IC TXRX T1 1-CHIP 5V 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21552L+

• Function: Single-Chip Transceiver
• Interface: E1, HDLC, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 64 Kbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 75 mA (Typ)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Ic Interface Type: Parallel, Serial
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 100
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 21-9 TRANSMIT SIDE ESF TIMING
Notes:
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TSYNC
FRAME#
TSYNC
TSYNC
TSSYNC
TLCLK
TLCLK
TLINK
TLINK
TSYNC in frame mode (TCR2.3 = 0) and double-wide frame sync is not enabled (TCR2.4 = 0)
TSYNC in frame mode (TCR2.3 = 0) and double-wide frame sync is enabled (TCR2.4 = 1)
TSYNC in multiframe mode (TCR2.3 = 1)
TLINK data (FDL bits) sampled during the F-bit time of odd frame and inserted into the outgoing T1 stream if enabled via
TCR1.2
ZBTSI mode is enabled (TCR2.5 = 1)
TLINK data (Z bits) sampled during the F-bit time of frames 1, 5, 9, 13, 17, and 21 and inserted into the outgoing stream
if enabled via TCR1.2
TLINK and TLCLK are not synchronous with TSSYNC
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