DS21552L+ Maxim Integrated Products, DS21552L+ Datasheet - Page 37

IC TXRX T1 1-CHIP 5V 100-LQFP

DS21552L+

Manufacturer Part Number
DS21552L+
Description
IC TXRX T1 1-CHIP 5V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21552L+

Function
Single-Chip Transceiver
Interface
E1, HDLC, J1, T1
Number Of Circuits
1
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
Product
Framer
Number Of Transceivers
1
Data Rate
64 Kbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
75 mA (Typ)
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Ic Interface Type
Parallel, Serial
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
LQFP
No. Of Pins
100
Filter Terminals
SMD
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TESMDM
TLOOP
RSMS
ECUS
PDE
CCR3.4
CCR3.3
CCR3.2
CCR3.1
CCR3.0
1 = Loss of Transmit Clock (LOTC)
RSYNC Multiframe Skip Control. Useful in framing format conversions from D4 to
ESF. This function is not available when the receive side elastic store is enabled.
0 = RSYNC will output a pulse at every multiframe
1 = RSYNC will output a pulse at every other multiframe note: for this bit to have any
affect, the RSYNC must be set to output multiframe pulses (RCR2.4=1 and
RCR2.3=0).
Pulse Density Enforcer Enable.
0 = disable transmit pulse density enforcer
1 = enable transmit pulse density enforcer
Error Counter Update Select. See Section 8 for details.
0 = update error counters once a second
1 = update error counters every 42 ms (333 frames)
Transmit Loop Code Enable. See Section 17 for details.
0 = transmit data normally
1 = replace normal transmitted data with repeating code as defined in TCD register
Transmit Elastic Store Minimum Delay Mode. See Section 14.4 for details.
0 = elastic stores operate at full two frame depth
1 = elastic stores operate at 32–bit depth
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