PCA9541APW/01 NXP Semiconductors, PCA9541APW/01 Datasheet - Page 23

• Manufacturer Part Number: PCA9541APW/01
• Manufacturer: NXP Semiconductors

Specifications of PCA9541APW/01

• Lead Free Status / Rohs Status: Compliant

NXP Semiconductors
PCA9541A_3
Product data sheet
Fig 16. Write to the Control register and switch from Channel 1 to Channel 0 (bus recovery/initialization not
SDA_MST0
SCL_MST0
INT1
INT0
(1) We assume that a read of the Control register was done by MASTER 0 before this sequence and that 000x 0101 was read
S
START condition
1 1 1 A3 A2 A1 A0 0
(MASTER 1 controlling the bus).
requested)
slave address
(1)
acknowledge
from slave
R/W
A
MASTER 1 has control of the bus
0 0 0 AI 0 0 0 1
command code register
increment
(between STOP and START) defined in the I
auto
and the interrupt is not masked (BUSINITMSK = 0)
if MASTER 1 was not idle at the switching moment
before sending commands to the downstream devices.
acknowledge
from slave
MASTER 0 must wait for the 'bus free time' value
Rev. 03 — 16 July 2009
2-to-1 I
A
0 0 0 0 0 1 0 0
if the interrupt is not masked
data Control register
BUSINIT
2
C-bus master selector with interrupt logic and reset
(BUSLOSTMSK = 0)
BUSON
acknowledge
2
MYBUS
C-bus specification
from slave
A
P
STOP
condition
After the STOP condition MASTER 1
is disconnected from the downstream
channel, and MASTER 0 is connected to
the downstream channel.
MASTER 0 has control of the bus
PCA9541A
© NXP B.V. 2009. All rights reserved.
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