FW82840 Intel Corporation, FW82840 Datasheet - Page 4

• Manufacturer Part Number: FW82840
• Description: 82840 Memory Controller Hub (MCH)
• Manufacturer: Intel Corporation

3.4.20. DRD—RDRAM Device Register Data Register (Device 0) .............................. 59
3.4.21. RICM—RDRAM Initialization Control Management Register (Device 0).......... 59
3.4.22. MCH Expansion RAC A/B Configuration Registers .......................................... 61
3.4.23. SMRAM—System Management RAM Control Register (Device 0) ................ 61
3.4.24. ESMRAMC—Extended System Management RAM Control Register
(Device 0) .......................................................................................................... 62
3.4.25. ACAPID—AGP Capability Identifier Register (Device 0) .................................. 63
3.4.26. AGPSTAT—AGP Status Register (Device 0)................................................... 64
3.4.27. AGPCMD—AGP Command Register (Device 0) ............................................. 65
3.4.28. AGPCTRL—AGP Control Register (Device 0) ................................................. 66
3.4.29. APSIZE—Aperture Size (Device 0) .................................................................. 66
3.4.30. ATTBASE Aperture Translation Table Base Register (Device 0) ................ 67
3.4.31. AMTT—AGP Interface Multi-Transaction Timer Register (Device 0) .............. 67
3.4.32. LPTT—Low Priority Transaction Timer Register (Device 0)............................. 68
3.4.33. RDTR—RDRAM Timing Register (Device 0) ................................................... 69
3.4.34. RDCR—RDRAM Refresh Control Register (Device 0)..................................... 70
3.4.35. TOM—Top of Low Memory Register (Device 0)............................................... 71
3.4.36. ERRSTS—Error Status Register (Device 0)..................................................... 71
3.4.37. ERRCMD—Error Command Register (Device 0) ............................................. 73
3.4.38. SMICMD—SMI Command Register (Device 0)................................................ 75
3.4.39. SCICMD—SCI Command Register (Device 0)................................................. 77
3.4.40. SKPD—Scratchpad Data (Device 0) ................................................................ 78
3.4.41. HERRCTL_STS—Host Error Control/Status Register (Device 0) .................... 79
3.4.42. DERRCTL_STS—DRAM Error Control/Status Register (Device 0) ................ 80
3.4.43. EAP—Error Address Pointer Register (Device 0)............................................. 80
3.4.44. AGPBCTRL—AGP Buffer Strength Control Register ....................................... 81
3.4.45. AGPAPPEND—AGP Append Disable Register................................................ 81
3.4.46. GTLNCLAMP—GTL N Clamp Disable Register............................................... 81
3.5.
AGP Bridge Registers (Device 1) .................................................................................. 82
3.5.1. VID1—Vendor Identification Register (Device 1).............................................. 83
3.5.2. DID1—Device Identification Register (Device 1) .............................................. 83
3.5.3. PCICMD1—PCI-PCI Command Register (Device 1) ....................................... 84
3.5.4. PCISTS1—PCI-PCI Status Register (Device 1) ............................................... 85
3.5.5. RID1—Revision Identification Register (Device 1) ........................................... 85
3.5.6. SUBC1—Sub-Class Code Register (Device 1) ................................................ 86
3.5.7. BCC1—Base Class Code Register (Device 1) ................................................. 86
3.5.8. MLT1—Master Latency Timer Register (Device 1) .......................................... 86
3.5.9. HDR1—Header Type Register (Device 1) ........................................................ 86
3.5.10. PBUSN1—Primary Bus Number Register (Device 1)....................................... 87
3.5.11. SBUSN1—Secondary Bus Number Register (Device 1) .................................. 87
3.5.12. SUBUSN1—Subordinate Bus Number Register (Device 1) ............................. 87
3.5.13. SMLT1—Secondary Master Latency Timer Register (Device 1) ...................... 88
3.5.14. IOBASE1—I/O Base Address Register (Device 1) ........................................... 88
3.5.15. IOLIMIT1—I/O Limit Address Register (Device 1)............................................ 89
3.5.16. SSTS1—Secondary PCI-PCI Status Register (Device 1)................................. 89
3.5.17. MBASE1—Memory Base Address Register (Device 1).................................... 90
3.5.18. MLIMIT1—Memory Limit Address Register (Device 1) .................................... 91
3.5.19. PMBASE1—Prefetchable Memory Base Address Register (Device 1) ............ 91
3.5.20. PMLIMIT1—Prefetchable Memory Limit Address Register (Device 1)............. 92
3.5.21. BCTRL1—PCI-PCI Bridge Control Register (Device 1) ................................... 92
3.5.22. ERRCMD1—Error Command Register (Device 1) ........................................... 94
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Datasheet