ISL59445IRZ-T13 Intersil, ISL59445IRZ-T13 Datasheet - Page 10

• Manufacturer Part Number: ISL59445IRZ-T13
• Description: IC AMP TRIPLE MUX 1GHZ 32-QFN
• Manufacturer: Intersil

Specifications of ISL59445IRZ-T13

• Applications: 4:1 Multiplexer-Amplifier
• Number Of Circuits: 3
• -3db Bandwidth: 1GHz
• Slew Rate: 1200 V/µs
• Current - Supply: 53mA
• Current - Output / Channel: 130mA
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

HIZ State
An internal pull-down resistor connected to the HIZ pin
ensures the device will be active with no connection to the
HIZ pin. The HIZ state is established within approximately
15ns (Figure 16) by placing a logic high (>2V) on the HIZ
pin. If the HIZ state is selected, the output is a high
impedance 1.4MΩ with approximately 1.5pF in parallel with
a 10µA bias current from the output. Use this state to control
the logic when more than one mux shares a common output.
In the HIZ state the output is three-stated, and maintains its
high Z even in the presence of high slew rates. The supply
current during this state is basically the same as the active
state.
ENABLE and Power Down States
The enable pin is active low. An internal pull-down resistor
ensures the device will be active with no connection to the
ENABLE pin. The Power Down state is established within
approximately 100ns (Figure 14), if a logic high (>2V) is
placed on the ENABLE pin. In the Power Down state, the
output has no leakage but has a large variable capacitance
(on the order of 15pF), and is capable of being back-driven.
Under this condition, large incoming slew rates can cause
fault currents of tens of mA. Do not use this state as a
logic control for applications driving more than one mux
on a common output.
LE State
The ISL59424 is equipped with a Latch Enable pin. A logic
high (>2V) on the LE pin latches the last logic state. This
logic state is preserved when cycling HIZ or ENABLE
functions.
Limiting the Output Current
No output short circuit current limit exists on these parts. All
applications need to limit the output current to less than
50mA. Adequate thermal heat sinking of the parts is also
required.
Application Example
Figure 21 illustrates the use of the ISL59445, two ISL84517
SPST switches and one NC7ST00P5X NAND gate to mux 3
different component video signals and one RGB video
signal. The SPDT switches provide the sync signal for the
V+ SUPPLY
V- SUPPLY
POWER
SIGNAL
LOGIC
GND
DE-COUPLING
CAPS
10
PROTECTION
SCHOTTKY
FIGURE 21. SCHOTTKY PROTECTION CIRCUIT
GND
S0
IN0
IN1
ISL59424, ISL59445
V+
V-
V+
V-
V+
V-
V+
V-
RGB video and disconnects the sync signal for the
component signal.
PC Board Layout
The frequency response of this circuit depends greatly on
the care taken in designing the PC board. The following are
recommendations to achieve optimum high frequency
performance from your PC board.
• The use of low inductance components such as chip
• Minimize signal trace lengths. Trace inductance and
• Match channel-channel analog I/O trace lengths and
• Maximize use of AC de-coupled PCB layers. All signal I/O
• Use proper value and location of termination resistors.
• When testing use good quality connectors and cables,
• Minimum of 2 power supply de-coupling capacitors are
• The NIC pins are placed on both sides of the input pins.
CONTROL
resistors and chip capacitors is strongly recommended.
capacitance can easily limit circuit performance. Avoid
sharp corners, use rounded corners when possible. Vias
in the signal lines add inductance at high frequency and
should be avoided. PCB traces greater than 1" begin to
exhibit transmission line characteristics with signal rise/fall
times of 1ns or less. High frequency performance may be
degraded for traces greater than one inch, unless strip line
are used.
layout symmetry. This will minimize propagation delay
mismatches.
lines should be routed over continuous ground planes (i.e.
no split planes or PCB gaps under these lines). Avoid vias
in the signal I/O lines.
Termination resistors should be as close to the device as
possible.
matching cable types and keeping cable lengths to a
minimum.
recommended (1000pF, 0.01µF) as close to the devices
as possible - Avoid vias between the cap and the device
because vias add unwanted inductance. Larger caps can
be farther away. When vias are required in a layout, they
should be routed as far away from the device as possible.
These pins are not internally connected to the die. It is
recommended these pins be tied to ground to minimize
crosstalk.
LOGIC
V+
V-
OUT
EXTERNAL
CIRCUITS
September 8, 2005
FN7456.2