ISL59445IRZ-T13 Intersil, ISL59445IRZ-T13 Datasheet - Page 9

IC AMP TRIPLE MUX 1GHZ 32-QFN

ISL59445IRZ-T13

Manufacturer Part Number
ISL59445IRZ-T13
Description
IC AMP TRIPLE MUX 1GHZ 32-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL59445IRZ-T13

Applications
4:1 Multiplexer-Amplifier
Number Of Circuits
3
-3db Bandwidth
1GHz
Slew Rate
1200 V/µs
Current - Supply
53mA
Current - Output / Channel
130mA
Mounting Type
Surface Mount
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AC Test Circuits
Figure 20A illustrates the optimum output load for testing AC
performance. Figure 20B illustrates the optimum output load
when connecting to 50Ω input terminated equipment.
Application Information
General
The ISL59424 and ISL59445 are triple 2:1 and 4:1 muxes
that are ideal for the matrix element of high performance
switchers and routers. The ISL59424 and ISL59445 are
optimized to drive a 1.5pF in parallel with a 500Ω load. The
capacitance can be split between the PCB capacitance an
and external load capacitance. Their low input capacitance
and high input resistance provide excellent 50Ω or 75Ω
terminations.
Ground Connections
For the best isolation and crosstalk rejection, all GND pins
and NIC pins must connect to the GND plane.
Control Signals
S0, S1, ENABLE, LE, HIZ - These pins are binary coded,
TTL/CMOS compatible control inputs. The S0, S1 pins select
which one of the inputs connect to the output. All three
amplifiers are switched simultaneously from their respective
inputs. The ENABLE, LE, HIZ pins are used to disable the part
to save power, latch in the last logic state and three-state the
output amplifiers, respectively. For control signal rise and fall
times less than 10ns the use of termination resistors close to
the part should be considered to minimize transients coupled
to the output.
FIGURE 20C. BACKLOADED TEST CIRCUIT FOR VIDEO CABLE APPLICATION. BANDWIDTH AND LINEARITY FOR R
FIGURE 20A. TEST CIRCUIT WITH OPTIMAL OUTPUT LOAD
WILL BE DEGRADED.
V
IN
50Ω
75Ω
or
ISL59424 & ISL59445
9
C
1.5pF
L
V
IN
50Ω
75Ω
or
ISL59424 & ISL59445
500Ω
R
L
ISL59424, ISL59445
FIGURE 20. TEST CIRCUITS
C
1.5pF
L
50Ω or 75Ω
R
S
Power-Up Considerations
The ESD protection circuits use internal diodes from all pins
the V+ and V- supplies. In addition, a dV/dT- triggered clamp
is connected between the V+ and V- pins, as shown in the
Equivalent Circuits 1 through 4 section of the Pin Description
table. The dV/dT triggered clamp imposes a maximum
supply turn-on slew rate of 1V/µs. Damaging currents can
flow for power supply rates-of-rise in excess of 1V/µs, such
as during hot plugging. Under these conditions, additional
methods should be employed to ensure the rate of rise is not
exceeded.
Consideration must be given to the order in which power is
applied to the V+ and V- pins, as well as analog and logic
input pins. Schottky diodes (Motorola MBR0550T or
equivalent) connected from V+ to ground and V- to ground
(Figure 21) will shunt damaging currents away from the
internal V+ and V- ESD diodes in the event that the V+
supply is applied to the device before the V- supply.
If positive voltages are applied to the logic or analog video
input pins before V+ is applied, current will flow through the
internal ESD diodes to the V+ pin. The presence of large
decoupling capacitors and the loading effect of other circuits
connected to V+, can result in damaging currents through
the ESD diodes and other active circuits within the device.
Therefore, adequate current limiting on the digital and
analog inputs is needed to prevent damage during the time
the voltages on these inputs are more positive than V+.
FIGURE 20B. TEST CIRCUIT FOR MEASURING WITH 50Ω OR
V
IN
50Ω
75Ω
or
ISL59424 & ISL59445
EQUIPMENT
50Ω
75Ω
75Ω INPUT TERMINATED EQUIPMENT
or
C
1.5pF
TEST
L
475Ω
462.5Ω
R
or
S
50Ω
75Ω
or
L
LESS THAN 500Ω
EQUIPMENT
September 8, 2005
50Ω
75Ω
or
TEST
FN7456.2

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