AT32UC3A4256 Atmel Corporation, AT32UC3A4256 Datasheet - Page 58

• Manufacturer Part Number: AT32UC3A4256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A4256

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7.6.3
Name:
Access Type:
Offset:
Reset Value:
• MASK: Clock Mask
32072G–11/2011
31
23
15
7
If bit n is written to zero, the clock for module n is stopped. If bit n is writen to one, the clock for module n is enabled according
to the current power mode. The number of implemented bits in each mask register, as well as which module clock is controlled
by each bit, is shown in
Table 7-7.
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Clock Mask Registers
CPUMASK
-
OCD
-
-
-
-
-
-
-
-
-
-
-
-
-
-
30
22
14
CPU/HSB/PBA/PBBMASK
Read/Write
0x08-0x14
0x00000003/0x00000FFF/0x001FFFFF/0x000003FF
6
(1)
Maskable module clocks in AT32UC3A3.
Table 7-7 on page
29
21
13
5
HSBMASK
FLASHC
PBA Bridge
PBB Bridge
USBB
PDCA
EBI
PBC Bridge
DMACA
BUSMON
HRAMC0
HRAMC1
(2)
-
-
-
-
58.
28
20
12
4
MASK[31:24]
MASK[23:16]
MASK[15:8]
MASK[7:0]
PBAMASK
INTC
I/O
PDCA
PM/RTC/EIC
ADC
SPI0
SPI1
TWIM0
TWIM1
TWIS0
TWIS1
USART0
USART1
USART2
USART3
SSC
27
19
11
3
26
18
10
2
PBBMASK
HMATRIX
USBB
FLASHC
SMC
SDRAMC
ECCHRS
MCI
BUSMON
MSI
AES
-
-
-
-
-
-
25
17
9
1
24
16
8
0
58