AT32UC3A4256 Atmel Corporation, AT32UC3A4256 Datasheet - Page 77

• Manufacturer Part Number: AT32UC3A4256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A4256

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7.6.19
Name:
Access Type:
Offset:
Reset Value:
• BOD33: Brown-out 3V3 Reset
• OCDRST: OCD Reset
• CPUERR: CPU Error
• JTAG: JTAG reset
• WDT: Watchdog Reset
• EXT: External Reset Pin
• BOD: Brown-out Reset
• POR Power-on Reset
32072G–11/2011
CPUERR
31
23
15
7
-
-
-
The CPU was reset due to the supply voltage 3V3 being lower than the brown-out threshold level.
The CPU was reset because the RES strobe in the OCD Development Control register has been written to one.
The CPU was reset because it had detected an illegal access.
The CPU was reset by setting the bit RC_CPU in the JTAG reset register.
The CPU was reset because of a watchdog timeout.
The CPU was reset due to the RESET pin being asserted.
The CPU was reset due to the supply voltage 1V8 being lower than the brown-out threshold level.
The CPU was reset due to the supply voltage being lower than the power-on threshold level.
Reset Cause Register
30
22
14
RCAUSE
Read-only
0x140
0x00000000
6
-
-
-
-
29
21
13
5
-
-
-
-
JTAG
28
20
12
4
-
-
-
WDT
27
19
11
3
-
-
-
BOD33
EXT
26
18
10
2
-
-
BOD
25
17
9
1
-
-
-
OCDRST
POR
24
16
8
0
-
-
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