AT89C5131A-M Atmel Corporation, AT89C5131A-M Datasheet - Page 71
AT89C5131A-M
Manufacturer Part Number
AT89C5131A-M
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C5130A-M.pdf
(188 pages)
2.AT89C5130A-M.pdf
(4 pages)
3.AT89C5130A-M.pdf
(34 pages)
Specifications of AT89C5131A-M
Flash (kbytes)
32 Kbytes
Max. Operating Frequency
48 MHz
Cpu
8051-12C
Max I/o Pins
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Eeprom (bytes)
1024
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART/USB
Watchdog
Yes
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15.2.2
15.2.3
4337K–USB–04/08
Broadcast Address
Reset Addresses
The SADEN byte is selected so that each slave may be addressed separately.
For slave A, bit 0 (the LSB) is a don’t care bit; for slaves B and C, bit 0 is a 1. To communicate
with slave A only, the master must send an address where bit 0 is clear (e.g. 1111 0000b).
For slave A, bit 1 is a 1; for slaves B and C, bit 1 is a don’t care bit. To communicate with slaves
B and C, but not slave A, the master must send an address with bits 0 and 1 both set (e.g. 1111
0011b).
To communicate with slaves A, B and C, the master must send an address with bit 0 set, bit 1
clear, and bit 2 clear (e.g. 1111 0001b).
A broadcast address is formed from the logical OR of the SADDR and SADEN registers with
zeros defined as don’t care bits, e.g.:
The use of don’t care bits provides flexibility in defining the broadcast address, in most applica-
tions, a broadcast address is FFh. The following is an example of using broadcast addresses:
For slaves A and B, bit 2 is a don’t care bit; for slave C, bit 2 is set. To communicate with all of
the slaves, the master must send an address FFh. To communicate with slaves A and B, but not
slave C, the master can send and address FBh.
On reset, the SADDR and SADEN registers are initialized to 00h, i.e. the given and broadcast
addresses are XXXX XXXXb (all don’t care bits). This ensures that the serial port will reply to any
address, and so, that it is backwards compatible with the 80C51 microcontrollers that do not
support automatic address recognition.
Slave C:SADDR1111 0011b
Slave A:SADDR1111 0001b
Slave B:SADDR1111 0011b
Slave C:SADDR = 1111 0011b
Broadcast = SADDR OR SADEN1111 111Xb
SADEN1111 1101b
Given1111 00X1b
SADDR0101 0110b
SADEN1111 1100b
SADEN1111 1010b
Broadcast1111 1X11b,
SADEN1111 1001b
Broadcast1111 1X11B,
SADEN1111 1101b
Broadcast1111 1111b
AT89C5130A/31A-M
71
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