ATtiny2313 Atmel Corporation, ATtiny2313 Datasheet - Page 105

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ATtiny2313

Manufacturer Part Number
ATtiny2313
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny2313

Flash (kbytes)
2 Kbytes
Pin Count
20
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
18
Ext Interrupts
18
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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2543L–AVR–08/10
Note:
Table 45
rect or the phase and frequency correct, PWM mode.
Table 45. Compare Output Mode, Phase Correct and Phase and Frequency Correct PWM
Note:
• Bit 1:0 – WGM11:0: Waveform Generation Mode
Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode, and three types
of Pulse Width Modulation (PWM) modes.
COM1A1/COM1B1
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. In
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set.
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the phase cor-
0
0
1
1
this case the compare match is ignored, but the set or clear is done at TOP.
Mode” on page 96.
“Phase Correct PWM Mode” on page 98.
COM1A0/COM1B0
for more details.
0
1
0
1
Table
46. Modes of operation supported by the Timer/Counter
Description
Normal port operation, OC1A/OC1B
disconnected.
WGM13=0: Normal port operation, OC1A/OC1B
disconnected.
WGM13=1: Toggle OC1A on Compare Match,
OC1B reserved.
Clear OC1A/OC1B on Compare Match when up-
counting. Set OC1A/OC1B on Compare Match
when downcounting.
Set OC1A/OC1B on Compare Match when up-
counting. Clear OC1A/OC1B on Compare Match
when downcounting.
(See “Modes of Operation” on page
for more details.
94.).
See “Fast PWM
(1)
105
See

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