ATtiny861 Automotive Atmel Corporation, ATtiny861 Automotive Datasheet - Page 124

• Manufacturer Part Number: ATtiny861 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny861 Automotive

• Flash (kbytes): 8 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

16.11.8
16.11.9
16.11.10 OCR1C – Timer/Counter1 Output Compare Register C
124
ATtiny261/ATtiny461/ATtiny861
OCR1A – Timer/Counter1 Output Compare Register A
OCR1B – Timer/Counter1 Output Compare Register B
The output compare register A is an 8-bit read/write register.
The Timer/Counter Output Compare Register A contains data to be continuously compared with
Timer/Counter1. Actions on compare matches are specified in TCCR1A. A compare match does
only occur if Timer/Counter1 counts to the OCR1A value. A software write that sets TCNT1 and
OCR1A to the same value does not generate a compare match.
A compare match will set the compare interrupt flag OCF1A after a synchronization delay follow-
ing the compare event.
Note that, if 10-bit accuracy is used special procedures must be followed when accessing the
internal 10-bit Output Compare Registers via the 8-bit AVR data bus. These procedures are
described in section
The output compare register B is an 8-bit read/write register.
The Timer/Counter Output Compare Register B contains data to be continuously compared with
Timer/Counter1. Actions on compare matches are specified in TCCR1. A compare match does
only occur if Timer/Counter1 counts to the OCR1B value. A software write that sets TCNT1 and
OCR1B to the same value does not generate a compare match.
A compare match will set the compare interrupt flag OCF1B after a synchronization delay follow-
ing the compare event.
Note that, if 10-bit accuracy is used special procedures must be followed when accessing the
internal 10-bit Output Compare Registers via the 8-bit AVR data bus. These procedures are
described in section
The output compare register C is an 8-bit read/write register.
The Timer/Counter Output Compare Register C contains data to be continuously compared with
Timer/Counter1, and a compare match will clear TCNT1. This register has the same function in
Normal mode and PWM modes.
Bit
0x2D (0x4D)
Read/Write
Initial value
Bit
0x2C (0x4C)
Read/Write
Initial value
Bit
0x2B (0x4B)
Read/Write
Initial value
MSB
MSB
MSB
R/W
R/W
R/W
7
0
7
0
7
1
“Accessing 10-Bit Registers” on page
“Accessing 10-Bit Registers” on page
R/W
R/W
R/W
6
0
6
0
6
1
R/W
R/W
R/W
5
0
5
0
5
1
R/W
R/W
R/W
4
0
4
0
4
1
R/W
R/W
R/W
3
0
3
0
3
1
112.
112.
R/W
R/W
R/W
2
0
2
0
2
1
R/W
R/W
R/W
1
0
1
0
1
1
LSB
LSB
LSB
R/W
R/W
R/W
0
0
0
0
0
1
7753F–AVR–01/11
OCR1A
OCR1B
OCR1C